Electrically programmable memory cell and methods for...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185050, C257S219000

Reexamination Certificate

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07116583

ABSTRACT:
The invention relates to an electrically programmable memory cell comprising a memory transistor having a source and a drain zone and also a storage electrode and a control electrode, and a selection transistor having a source and a drain zone and also a control electrode, the drain zones of the storage and selection transistors being electrically conductively connected to one another. In this case, the drain zone of the selection transistor has a connection zone and an intermediate zone doped more weakly than the connection zone, the intermediate zone being arranged between the connection zone and a channel zone of the selection transistor and serving, during the programming operation, for taking up a programming voltage and thus for protecting a control electrode insulation layer of the selection transistor.

REFERENCES:
patent: 5278428 (1994-01-01), Yamada et al.
patent: 5621684 (1997-04-01), Jung
patent: 6770535 (2004-08-01), Yamada et al.
patent: 6906376 (2005-06-01), Hsu et al.
patent: 6940189 (2005-09-01), Gizara
patent: 2003/0142549 (2003-07-01), Rowlandson et al.
patent: 2004/0224476 (2004-11-01), Yamada et al.
Microchip Technology Inc., “Everything a System Engineer Needs to Know about Serial EEPROM Endurance,” Microchip, AN537, pp. 8-15-8-16, (1992).

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