Electrically programmable memory and method of programming

Details Electrically programmable memory and method of programming Electrically programmable memory and method of programming

1998-05-20

2000-08-08

Yoo, D. Hyein

Static information storage and retrieval

Floating gate

Particular biasing

36518503, G11C 1604

Patent

active

061011258

ABSTRACT:
An electrically programmable memory having floating gate FET cells (10.2) each having a drain electrode (10.10), and a source electrode (10.8); a first voltage source for applying simultaneously to one of the drain and source electrodes of a plurality of cells of the memory a first voltage (AGND)for a programming time, the first voltage being selectable so as to determine the multi-level value programmed into the cell, thereby allowing simultaneous multi-level programming of the plurality of cells; a voltage pluse source for applying to the other of the drain and source electrodes of the plurality of cells a succession of voltage pulses (Vpp) during the programming time; and a programming determiner for determining after each of the succession of the voltage pulses whether the cell is programmed to a desired value.

REFERENCES:
patent: 5553020 (1996-09-01), Keeney et al.
patent: 5768184 (1998-06-01), Hayashi et al.
patent: 5768191 (1998-06-01), Choi et al.
patent: 5892710 (1999-04-01), Fiazio et al.
patent: 5909390 (1999-06-01), Harari

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