Static information storage and retrieval – Interconnection arrangements
Patent
1997-04-30
1999-04-27
Le, Vu A.
Static information storage and retrieval
Interconnection arrangements
36518511, 36518513, 36518517, G11C 700
Patent
active
058986065
ABSTRACT:
In erasing, electrons are simultaneously injected into floating gates from sources of a plurality of memory cells. Thus, the threshold voltages of the plurality of memory cells are increased. In programming, electrons are emitted from a floating gate of a selected memory cell to a drain. Thus, the threshold voltage of the selected memory cell is reduced.
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Ajika Natsuo
Fukumoto Atsushi
Futatsuya Tomoshi
Kobayashi Shin-ichi
Kunori Yuichi
Le Vu A.
Mitsubishi Denki & Kabushiki Kaisha
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