Electrically polar integrated capacitor and method of making...

Details Electrically polar integrated capacitor and method of making... Electrically polar integrated capacitor and method of making...

2002-09-13

2003-07-22

Dinkins, Anthony (Department: 2831)

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

C361S306100, C257S532000

Reexamination Certificate

active

06597562

ABSTRACT:

BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to an integrated capacitor, and more particularly, to an electrically polar integrated capacitor suited for analog/digital(A/D) converters, digital/analog(D/A) converters, or switch cap circuits.
2. Description of the Prior Art
Passive components such as capacitors are extensively used in integrated circuit (IC) design for radio-frequency (RF) and mixed-signal applications, such as filters, resonant circuits and bypassing. Due to trends toward higher-levels of integration to achieve reduction in cost associated with IC fabrication processes, the IC industry continually strives to economize each step of the fabrication process to the greatest extent possible.
FIG. 1
is a typical view fragmentarily illustrating a high capacitance density integrated capacitor according to the prior art. As shown in
FIG. 1
, the prior art integrated capacitor
1
consists of a plurality of parallel-arranged vertical metal plates
100
and
120
. In
FIG. 1
, different shadings are used to distinguish the two terminals of the capacitor
1
, where the vertical plates
120
are electrically connected to terminal A (or node A), and the vertical plates
100
are electrically connected to terminal B (or node B). The vertical metal plates
100
and
120
are fabricated on a semiconductor substrate (not explicitly shown). Each of the vertical metal plates
100
consists of a plurality of metal slabs
10
a,
10
b,
10
c
and
10
d
connected vertically using multiple via plugs
11
a,
11
b
and
11
c
that are typically composed of metals. Each of the vertical metal plates
120
consists of a plurality of metal slabs
12
a,
12
b,
12
c
and
12
d
connected vertically using multiple via plugs
13
a,
13
b
and
13
c.
The vertical plate
100
and the vertical plate
120
are isolated from each other by a dielectric layer (not shown). Generally, metal slabs
10
a,
10
b,
10
c
and
10
d
and metal slabs
12
a,
12
b,
12
c
and
12
d
of the prior art integrated capacitor
1
are fabricated in an interconnect process known in the art. Unlike the traditional metal-on-metal (MOM) capacitors as known to those skilled in the art, the prior art integrated capacitor
1
is fabricated without using extra photo-masks, thereby reducing production cost. Moreover, the prior art integrated capacitor
1
provides higher capacitance per unit area.
However, in operation, parasitic capacitance is produced at both node A and node B of the prior art integrated capacitor
1
between the vertical plate
120
and the substrate and between the vertical plate
100
and the substrate, hence rendering the prior art integrated capacitor
1
electrically non-polar. Please refer to
FIG. 2
with reference to FIG.
1
.
FIG. 2
is an equivalent circuit diagram of the prior art integrated capacitor
1
as set forth in FIG.
1
. As mentioned, the vertical plates
120
of the integrated capacitor
1
are electrically connected to the node A, and the vertical plates
100
of the integrated capacitor
1
are electrically connected to the node B. In operation, inter-plate capacitance C
in
, parasitic capacitance C
A
, and parasitic capacitance C
B
are generated between node A and node B. The parasitic capacitance C
A
is induced between lowest metal slab
10
a
of the vertical metal plate
100
and the electrically grounded semiconductor substrate. The parasitic capacitance C
B
is induced between lowest metal slab
12
a
of the vertical metal plate
120
and the electrically grounded semiconductor substrate. Due to the non-polar property presented by the prior art integrated capacitor
1
, the prior art integrated capacitor
1
is therefore not suited for the design of analog/digital(A/D) converters, digital/analog (D/A) converters, or switch cap circuits.
SUMMARY OF INVENTION
Accordingly, the primary objective of the claimed invention is to provide an electrically polar integrated capacitor with a high capacitance density that is suited for analog/digital(A/D) converters, digital/analog(D/A) converters, or switch cap circuits.
According to one preferred embodiment of this invention, an integrated capacitor having an electrically polar property is disclosed. The integrated capacitor comprises a semiconductor substrate. A first vertical plate is laid over the semiconductor substrate. The first vertical plate consists of a plurality of first conductive slabs connected vertically using multiple first via plugs. A second vertical plate is laid over the semiconductor substrate in parallel with the first vertical plate. The second vertical plate consists of a plurality of second conductive slabs connected vertically using multiple second via plugs. A conductive plate is laid under the first vertical plate and second vertical plate over the semiconductor substrate for shielding the first vertical plate from producing a plate-to-substrate parasitic capacitance thereof. The second vertical plate is electrically connected with the conductive plate using a third via plug.
According to another preferred embodiment of this invention, an integrated capacitor having an electrically polar property is disclosed. The integrated capacitor comprises a semiconductor substrate and a first vertical capacitor bar laid over the semiconductor substrate. The first vertical capacitor bar consists of a plurality of first conductive squares connected vertically using multiple first via plugs. A second vertical capacitor bar is laid over the semiconductor substrate in parallel with the first vertical capacitor bar. The second vertical capacitor bar consists of a plurality of second conductive squares connected vertically using multiple second via plugs. A parallel conductive plate is laid under the first vertical capacitor bar and second vertical capacitor bar over the semiconductor substrate for shielding the first vertical capacitor bar from producing a plate-to-substrate parasitic capacitance thereof. The second vertical capacitor bar is electrically connected with the parallel conductive plate using a third via plug.
The foregoing has outlined, rather broadly, preferred and alternative features of the claimed invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the claimed invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.


REFERENCES:
patent: 5208725 (1993-05-01), Akcasu
patent: 6037621 (2000-03-01), Wilson
patent: 6188121 (2001-02-01), Baldi et al.
patent: 6385033 (2002-05-01), Javanifard et al.

Affiliated with

Also associated with

Rating

Electrically polar integrated capacitor and method of making... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrically polar integrated capacitor and method of making..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrically polar integrated capacitor and method of making... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3080589