Electrically modifiable non-volatile memory incorporating test f

Details Electrically modifiable non-volatile memory incorporating test f Electrically modifiable non-volatile memory incorporating test f

1995-04-07

1997-07-01

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular connection

36518529, 365201, 371 213, G11C 1606, G01R 3128

Patent

active

056445300

ABSTRACT:
The disclosed device can be used to accelerate the tests carried out on memories by using a row and column address generator normally designed for operations of pre-erasure programming of the memory. The working in test mode is determined by a test word. During a test, row and/or column counters of the generator are selectively incremented by an incrementation signal given by a control unit that performs a pre-erasure programming operation. Application notably to FLASH EEPROM memories and the integrated circuits that incorporate these memories.

REFERENCES:
patent: 4024386 (1977-05-01), Caudel et al.
patent: 4430735 (1984-02-01), Catiller
patent: 4672583 (1987-06-01), Nakaizumi
patent: 4744058 (1988-05-01), Kawashima et al.
patent: 4872168 (1989-10-01), Aadsen et al.

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