Electrically erasable programmable read-only-memory cell with si

Details Electrically erasable programmable read-only-memory cell with si Electrically erasable programmable read-only-memory cell with si

1991-08-30

1993-11-30

LaRoche, Eugene R.

Static information storage and retrieval

Floating gate

Particular biasing

257328, 257327, 365900, 365218, H01L 2978

Patent

active

052671941

ABSTRACT:
A small and shrinkable EEPROM cell and method of forming such a cell are provided which includes a control gate having a reentrant profile and a side-wall floating gate conforming to that profile. A predetermined portion of the floating gate overlies the source region which accelerates programming speed. The reentrant profile of the floating gate under the control gate accelerates erasing of the cell. Because of the self-aligned structure of the cell, the EEPROM has a small cell area and is insensitive to layer misalignment. Because of its configuration, the EEPROM cell is easily incorporated into an array of like cells sharing a common source region which facilitates "flash" erasing.

REFERENCES:
patent: 5095344 (1992-03-01), Harari

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