Electrically erasable programmable read-only memory cell having

Details Electrically erasable programmable read-only memory cell having Electrically erasable programmable read-only memory cell having

1981-12-28

1984-05-29

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365104, G11C 1140

Patent

active

044519052

ABSTRACT:
An electrically erasable programmable read-only memory, comprising a plurality of floating gate tunneling metal oxide semiconductor field effect transistors, does not require an addressing transistor in each cell. Instead, the gate decoder applies a sufficiently negative gate voltage to unselected ones of the transistors so that they are turned off regardless of the amount of charge on their floating polysilicon gates. Writing and erasure of data is performed without disturbing data in memory cells not selected for writing or erasure despite the absence of a series connected addressing transistor.

REFERENCES:
patent: 4112509 (1978-09-01), Wall
patent: 4241424 (1980-12-01), Dickson et al.
patent: 4377857 (1983-03-01), Tickle

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