Electrically erasable programmable read-only memory cell having

Details Electrically erasable programmable read-only memory cell having Electrically erasable programmable read-only memory cell having

1980-11-28

1983-04-05

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365104, 357 23, G11C 700

Patent

active

043793436

ABSTRACT:
In a CMOS FATMOS EEPROM, in which a floating gate and its associated tunneling region overlies the source to drain channel, device density is dramatically improved by sharing a source diffusion between adjacent FATMOS transistors and by reversing the function of the source and drain diffusions between reading and writing operations. During writing of a logic "one" into an individual memory cell, the shared diffusion and the control gate are held at +18 volts while the well region is grounded and the other diffusion is selectively grounded.

REFERENCES:
patent: 4099196 (1978-07-01), Simko
patent: 4132904 (1979-01-01), Harari

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