Electrically erasable programmable read only memory and method o

Details Electrically erasable programmable read only memory and method o Electrically erasable programmable read only memory and method o

1995-03-21

1996-10-15

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular connection

365154, 365201, 36518905, G11C 1140

Patent

active

055661106

ABSTRACT:
An improved electrically erasable read only memory (EEPROM) includes a EEPROM cell and a static random access memory (SRAM) cell. Complementary pairs of complementary metal oxide semiconductor (CMOS) transistors connect the gates of transistors forming the EEPROM cell to either the corresponding data nodes of the SRAM cell or to a fixed read or nonzero test voltage. When formed into an array, it is not necessary to replicate differential sense circuitry in every cell. EEPROM transistor pairs are combined into columns which share a common sense latch. The nonsero test voltage allows for measurement of the actual threshold voltages (V.sub.T) of each EEPROM device individually.

REFERENCES:
patent: 4400799 (1983-08-01), Gudger et al.
patent: 4979004 (1990-12-01), Esquivel et al.
patent: 4980859 (1990-12-01), Guterman et al.
patent: 5045489 (1991-09-01), Gill et al.
patent: 5045490 (1991-09-01), Esquivel et al.
patent: 5051958 (1991-09-01), Arakawa
patent: 5053839 (1991-10-01), Esquivel et al.

Affiliated with

Also associated with

Rating

Electrically erasable programmable read only memory and method o does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrically erasable programmable read only memory and method o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrically erasable programmable read only memory and method o will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1252295