Electrically erasable programmable read only flash memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

3651851, 36518526, G11C 700

Patent

active

060523115

ABSTRACT:
An electrically erasable programmable read only flash memory having a buried floating gate structure buries the floating gate within the substrate. The source and drain regions are located beside the floating gate, and the control gate is located on the surface of the substrate and above the floating gate. In the program mode of read only flash memory based on the structure of this invention, the tunneling effect occurs between the floating gate and control gate to reduce leakage current and to raise the programming rate, which has the advantage of increasing the integration of memory cells.

REFERENCES:
patent: 3740689 (1973-06-01), Yamashita
patent: 3974055 (1976-08-01), Arai

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