Electrically erasable programmable nonvolatile semiconductor mem

Details Electrically erasable programmable nonvolatile semiconductor mem Electrically erasable programmable nonvolatile semiconductor mem

1998-02-24

1999-09-28

Mai, Son

Static information storage and retrieval

Floating gate

Particular connection

36518511, 36518904, G11C 1604, G11C 700

Patent

active

059598875

ABSTRACT:
An electrically erasable programmable nonvolatile semiconductor memory has a memory cell array having a plurality of memory cells which are placed as a matrix configuration. The memory cell array is divided into a plurality of memory cell blocks having required sizes by splitting each bit line of the memory cell array at: an optional position. This memory provides a dual operation function without complicating the circuit thereof or increasing the chip size thereof. The bit structure of each memory cell block to be divided from the memory cell array is variable.

REFERENCES:
patent: 5568421 (1996-10-01), Aritome
patent: 5748528 (1998-05-01), Campardo et al.

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