Electrically erasable non-volatile semiconductor memory

Metal working – Method of mechanical manufacture – Assembling or joining

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H01L 2978

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active

041159144

ABSTRACT:
A non-volatile semiconductor storage device comprising a dual gate field effect transistor in which an electrically floating gate acts as a charge storage medium. An insulating layer of an appropriate dielectric material separates the floating gate from the active portion of the transistor. A predetermined section of this insulating layer is relatively thin to permit this section of the floating gate to be relatively close to a corresponding predetermined section of the transistor, thus facilitating the transfer of charges between the transistor substrate and the gate. When charges reach the floating gate either through tunneling or avalanche injection, they are entrapped and stored there, thus providing memory in the structure. That is, the electric field induced by these charges is maintained in the transistor even after the field inducing force is removed. Erasing is achieved by removing the charges from the floating gate by reverse tunneling through the relatively thinner insulator region.

REFERENCES:
patent: 3865652 (1975-02-01), Agusta et al.
patent: 4016588 (1977-04-01), Ohya et al.
Tickle et al; "Electrically Alterable Nonvolatile Semiconductor Memories" Session 4, 1972 Wescon Technical Papers.
Rapp; "Silicon on Sapphire" Electronics Products Magazine (1/15/73), pp. 83-84.

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