Electrically erasable non-volatile memory cell with no static po

Details Electrically erasable non-volatile memory cell with no static po Electrically erasable non-volatile memory cell with no static po

1999-05-26

2000-05-23

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518911, 36518523, G11C 1604

Patent

active

060672528

ABSTRACT:
An electrically erasable non-volatile memory cell dissipates virtually no power by disabling a pull-up current when the non-volatile memory cell is programmed. In one embodiment, to properly initialize the electrically erasable non-volatile memory cell, the power of an inverting output buffer is provided only after the pull-up circuit substantially completes pulling up an input terminal of the inverting output buffer. In one embodiment, the electrically erasable non-volatile memory cell is used in a programmable integrated circuit.

REFERENCES:
patent: 5067111 (1991-11-01), Asano et al.
patent: 5717634 (1998-02-01), Smayling et al.
patent: 5815444 (1998-09-01), Ohta
patent: 5835402 (1998-10-01), Rao et al.
patent: 5862099 (1999-01-01), Gannage et al.
patent: 5995423 (1999-11-01), Lakhani et al.

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