Static information storage and retrieval – Floating gate – Particular biasing
Patent
1991-12-30
1993-10-12
Dixon, Joseph L.
Static information storage and retrieval
Floating gate
Particular biasing
365218, 36523006, G11C 800, G11C 1134
Patent
active
052532003
ABSTRACT:
An electrically erasable programmable nonvolatile memory device includes a plurality of memory cells. The memory device has architecture similar to or the same as an UV-EPROM. Erasure operating is performed by applying a negative voltage to a control gate so as to inject holes into the floating gate.
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A 256K Flass EEPROM Using Triple Polysilicon Tech.; IEEE, vol. 21, No. 10, A Single Transistor EEPROM Cell and Its Implementation In a 512K CMOS.
Dixon Joseph L.
Kananen Ronald P.
Sony Corporation
Whitfield Michael A.
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