Electrically erasable and programmable read only memory device w

Static information storage and retrieval – Floating gate – Particular biasing

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36518523, 365201, G11C 1600

Patent

active

056468911

ABSTRACT:
A verify unit incorporated in an electrically erasable and programmable read only memory device concurrently verifies erased state for selected floating gate type memory transistors in an erase-and-verify mode, and generates a detecting signal representative of an entry of the selected floating gate type memory transistors into the erased state so as to cause a sense amplifier unit to supply a verify signal to an external eraser.

REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 5297096 (1994-03-01), Terada et al.
patent: 5335198 (1994-08-01), Van Buskirk et al.
patent: 5400287 (1995-03-01), Fuchigami
patent: 5528546 (1996-06-01), Chao et al.

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