Electrically erasable and programmable read only memory device h

Static information storage and retrieval – Floating gate – Particular biasing

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Details

365218, 257506, 257510, 257513, G11C 1134, H01L 2900

Patent

active

055026699

ABSTRACT:
An electrically erasable and programmable memory device has a twin well electrically separated by an insulating wall into a plurality of sections respectively assigned to a plurality of memory sectors. The plurality of sections are selectively biased for erasing data bits stored in floating type field effect transistors that form the plurality of memory sectors.

REFERENCES:
patent: 5051795 (1991-09-01), Gill et al.
patent: 5065212 (1991-11-01), Ohata et al.
patent: 5262985 (1993-11-01), Wada
patent: 5280454 (1994-01-01), Tanaka et al.
patent: 5384743 (1995-01-01), Rouy

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