Electrically erasable and programmable read-only memory cells wi

Details Electrically erasable and programmable read-only memory cells wi Electrically erasable and programmable read-only memory cells wi

1994-09-22

1996-09-03

Nelms, David C.

Static information storage and retrieval

Floating gate

257314, 257324, G11C 1134

Patent

active

055530176

ABSTRACT:
A method for producing electrically erasable and programmable read-only memory cells with a single polysilicon level, including the use of a sacrificial layer of silicon oxide to produce a high-thickness silicon oxide layer on the active area. The active area of the cell is protected from heavy source and drain implantation in order to improve reliability.

REFERENCES:
patent: 4047974 (1977-09-01), Harari
patent: 5254489 (1993-10-01), Nakata
patent: 5355332 (1994-10-01), Endoh et al.
Patent Abstracts of Japan, vol. 6, No. 259 (E-149)(1137) Dec. 17, 1982 & JP-A-57155769 (Fujistu K.K.) Sep. 25, 1982.
Patent Abstracts of Japan, vol. 12, No. 403 (e-674)(3250) Oct. 26, 1988 & JP-A-63144559 (Toshiba Corp) Jun. 16, 1988.

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