Electrically erasable and electrically programmable read only me

Details Electrically erasable and electrically programmable read only me Electrically erasable and electrically programmable read only me

1981-11-13

1989-02-07

Munson, Gene M.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 41, 365185, H01L 2978, H01L 2702, G11C 1140

Patent

active

048035297

ABSTRACT:
A semiconductor memory device having a MOS transistor with a floating gate capable of storing data.
The MOS transistor has an erase gate which overlaps part of the floating gate with an insulating film interposed therebetween. Upon application of a high voltage on the erase gate, the field emission is caused between the floating gate and the erase gate and the charge stored on the floating gate is removed.

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patent: 4119995 (1978-10-01), Simko
patent: 4203158 (1980-05-01), Frohman-Bentchkowsky et al.
patent: 4267558 (1981-05-01), Guterman
patent: 4274012 (1981-06-01), Simko
patent: 4302766 (1981-11-01), Guterman et al.
patent: 4314265 (1982-02-01), Simko
patent: 4331968 (1982-05-01), Gosney et al.
patent: 4531203 (1985-07-01), Masuoka et al.
patent: 4561004 (1985-12-01), Kuo et al.
Hoffman, "Floating Gate Nonvolatile Memory Cell", IBM Technical Disclosure Bulletin, vol. 22, No. 6 (Nov. 1979).
Japanese Patent No. 52-13782.
1980 IEEE International Solid-State Circuit Conference 152 (Feb. 1980), A 16Kb Electrically Erasable Nonvolatile Memory.

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