Electrically conductive substrate interconnect continuity region

Details Electrically conductive substrate interconnect continuity region Electrically conductive substrate interconnect continuity region

1993-02-22

1995-01-03

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 30, 437149, 437 44, H01L 21265

Patent

active

053786416

ABSTRACT:
The invention is a semiconductor memory structure having an electrically conductive substrate interconnect formed to provide electrical continuity between a buried contact region and a source/drain region of a transistor without overlap of the buried contact region with the source/drain region. The electrically conductive substrate interconnect is formed during an ion bombardment of the substrate wherein the ions enter the substrate at an oblique angle and underlie at least a portion of a region utilized to control the amount of ions entering the substrate.

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patent: 5270249 (1993-12-01), Fukuma
Wolf, S., Silicon Processing for the VLSI Era: vol. 2, Lattice Press 1990 p. 300.

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