Electrically and optically symmetrical analog-to-digital...

Details Electrically and optically symmetrical analog-to-digital... Electrically and optically symmetrical analog-to-digital...

2003-07-15

2004-09-07

Tokar, Michael (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S159000, C341S156000

Reexamination Certificate

active

06788237

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to analog-to-digital converters and, in particular, to an analog-to-digital converter coupled to perform analog-to-digital conversion for multiple analog signals.
DESCRIPTION OF THE RELATED ART
A CMOS image sensor with pixel level analog-to-digital conversion is described in U.S. Pat. No. 5,461,425 of B. Fowler et al. (“the '425 patent”), incorporated herein by reference in its entirety. Such an image sensor, referred to as a digital pixel sensor (DPS), provides a digital output signal at each pixel element representing the light intensity detected by that pixel element. The combination of a photodetector and an analog-to-digital (A/D) converter in an area image sensor helps enhance detection accuracy and reduce power consumption, and improves overall system performance.
FIG. 1
duplicates
FIG. 1
of the '425 patent and is a block diagram of a digital image sensor
10
as disclosed in the '425 patent. As is shown, digital image sensor
10
includes an image sensor core
12
which has a two-dimensional array of pixels. Each pixel
15
of sensor core
12
has a light detecting element (a photodetector or photosensor) coupled to a dedicated A/D converter. Each of the A/D converter outputs a stream of bits representative of the analog output of the associated light detecting element. In other words, the image sensor of the '425 patent outputs digital image data directly from each pixel. In a digital image sensor such as sensor
10
of
FIG. 1
, not only does the supporting circuitry for image sensor core
12
become dramatically simplified, there are also numerous advantages provided by the digital image sensor architecture in view of traditional CMOS image sensors. The advantages include better control of operations of the image sensor and far better image quality therefrom.
In the DPS array of the '425 patent, the analog-to-digital conversion (ADC) is based on first order sigma delta modulation. While this ADC approach requires fairly simple and robust circuits, it has the disadvantages of producing too much data and suffering from poor low light performance. U.S. Pat. No. 5,801,657 of Fowler et al. (“the '657 patent”) provides an alternative ADC mechanism that can significantly improve the overall system performance while minimizing the size of the A/D converters. The '657 patent is incorporated herein by reference in its entirety.
The '657 patent discloses a multi-channel bit-serial (MCBS) analog-to-digital conversion scheme where bit-serial analog-to-digital conversion can be carried out for a potentially very large number of analog signals simultaneously. Therefore, the MCBS ADC scheme is suitable for use in pixel level ADC in a digital pixel sensor because a large number of pixel signal values need to be converted at the same time.
FIG. 2
replicates
FIG. 1A
of the '657 patent and illustrates the basic architecture of the MCBS ADC technique. In
FIG. 2
, A/D converter
14
can support a multiple number of input channels, such as Channel
0
to Channel N, where each input channel is associated with an analog input signal In
0
to InN. Each input channel contains an 1-bit comparator
16
a-n
and a 1-bit latch
17
a-n
. Comparators
16
a-n
and latches
17
a-n
are controlled by external control signals RAMP and BITX. The two control signals are generated by a micro-controller
18
and a digital-to-analog (D/A) converter
19
and are broadcasted to all input channels, Channel
0
to Channel N.
The MCBS ADC scheme of the '657 patent provides several advantages. First, because all input channels are operated simultaneously, maximum throughput can be achieved. Second, because each input channel uses simple circuitry, i.e. each input channel includes only one 1-bit comparator and one 1-bit latch, the A/D converter consumes minimum circuit area in implementation. Furthermore, because the more complicated control circuitry, such as micro-controller
18
, are shared among all input channels, the overhead of the control circuitry is spread among all of the input channels. These advantages make MCBS A/D converter suitable for use in digitizing systems with a very large number of input channels, such as a digital image sensor with pixel-level A/D converters.
In the digital image sensor of
FIG. 1
, each pixel element includes a dedicated A/D converter. However, adding a dedicated A/D converter to each of the light detecting elements in an image sensor could introduce some practical problems limiting the practical application of such digital image sensors. One of the problems is that image sensor core
12
is inevitably larger than it would be without the dedicated A/D converters. If an image sensor is desired to have millions of photodetectors thereon, there would be a large number of dedicated A/D converters, which could take a significant amount of circuit area to implement in the image sensor core. Larger image sensor cores are undesirable because they typically lead to higher manufacturing cost and lower yield.
The '657 patent proposes an alternative sensor array architecture where an A/D converter is shared among a group of neighboring pixel elements.
FIG. 3
is a block diagram of a digital image sensor where an A/D converter is associated with four photodetectors in an image sensor array. In digital image sensor
20
of
FIG. 3
, sensor array
22
includes a two-dimensional array of photodetectors
24
. Instead of providing a dedicated ADC circuit to each photodetector, an ADC circuit
26
is shared among a group of four neighboring photodetectors
24
. Each of the ADC circuit
26
performs A/D conversion of the output voltage signal by multiplexing between the four neighboring photodetectors. Although the image capture time becomes four times longer in the shared-ADC architecture of
FIG. 3
than the dedicated-ADC architecture of
FIG. 1
, the shared-ADC architecture of
FIG. 3
has the advantage of retaining all of the benefit of pixel level analog-to-digital conversion while using a much smaller circuit area, thus reducing manufacturing cost and improving yield. The shared-ADC architecture is also described in “A 640×512 CMOS Image Sensor with Ultrawide Dynamic Range Floating-Point Pixel-Level ADC,” by David X. D. Yang et al., IEEE Journal of Solid-State Circuits, Vol. 34, No. 12, December 1999, p. 1821-1834, which reference is incorporated by reference in its entirety.
The '657 patent describes various schemes for multiplexing the four neighboring pixel elements to the associated A/D converter.
FIG. 4
is a block diagram illustrating a multiplexing scheme described in the '657 patent. In
FIG. 4
, four pixel elements, illustrated as photodiodes D
0
to D
3
, are multiplexed onto a single input terminal Inm of comparator
16
through four NMOS transistors 31-34 functioning as switches. The control terminals (or gate terminals) of transistors 31-34 are coupled to select signals S
0
to S
3
. At any one time, only one of the select signals S
0
to S
3
will go high to cause one of NMOS transistors
31
to
34
to turn on, thus coupling the analog pixel charge voltage at the respective photodiode to the input terminal Inm of comparator
16
.
The multiplexing scheme of
FIG. 4
has several disadvantages. First, this multiplexing scheme makes implementation of multiple sampling very difficult. Multiple sampling is an image capture technique capable of achieving a wide dynamic range without many of the disadvantages associated with other dynamic range enhancement techniques, such as degradation in signal-to-noise ratio and increased implementation complexity. Copending and commonly assigned U.S. patent application Ser. No. 09/567,786, entitled “Multiple Sampling via a Time-indexed Method to Achieve Wide Dynamic Ranges” of David Yang et al., describes a method for facilitating image multiple sampling using a time-indexed approach. Multiple sampling operation involves performing multiple reads from the sensor array over time and then normalizing the readout values

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