Electrically alterable n-bit per cell non-volatile memory with r

Details Electrically alterable n-bit per cell non-volatile memory with r Electrically alterable n-bit per cell non-volatile memory with r

1995-02-13

1997-01-21

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

365168, 365184, G11C 1134

Patent

active

055965270

ABSTRACT:
An electrically alterable non-volatile memory having a memory cell array including a plurality of memory cells, each memory cell including a transistor having a selected one of a plurality of different threshold voltages; a reference cell array including at least one set of reference cells, each reference cell in the set being set to a different threshold voltage; selection circuitry for selecting one of the memory cells; and a comparing circuitry for comparing a memory current read out of the selected memory cell with each of reference currents read out of the reference cells, sequentially in an order of levels of the threshold voltages set for the reference cells, respectively, thereby outputting data according to such comparison.

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patent: 5390146 (1995-02-01), Atwood et al.
patent: 5394362 (1995-02-01), Banks
Tokioka et al., The Proposal of Multi-Bit Type Flash Memory, The 53rd Autumn Meeting, 1992, The Japan Society of Applied Physics, No. 2, 17a-ZS-9.
Y. Tokioka, Y. Sato, S. Iwasa, K. Anzai, and T. Wada, "The Proposal of Multi-Bit Type Flash Memory", The 53rd Autumn Meeting, 1992, The Japan Society of Applied Physics, No. 2, 17a-ZS-9.

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