Electrically adjustable CMOS integrated voltage reference...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S563000

Reexamination Certificate

active

06414536

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor integrated circuit devices. More specifically, this invention relates to an integrated voltage reference circuit.
2. Description of the Related Art
Many analog circuit applications require the presence of a voltage reference function. One prior art approach to fulfill the voltage reference function is the employment of zener diodes, typically buried zener diodes. Other prior art voltage reference techniques, such as bandgap voltage reference circuits rely on bipolar transistor device. The disadvantages of these prior art solutions is that the process requirements for fabrication are typically inconsistent with integrated circuits that are fabricated using CMOS technology.
Therefore, a need exists to provide an integrated voltage reference circuit using conventional CMOS fabrication processes. Performance and flexibility would be enhanced by having the CMOS reference voltage circuit electrically adjustable to suit the requirements of various applications.
BRIEF SUMMARY
It is an object of this invention to provide an integrated voltage reference circuit using conventional CMOS technology and fabrication methods.
It is another object of this invention to provide an integrated voltage reference circuit that is electrically adjustable.
An improved voltage reference circuit is comprised of electrically adjustable analog devices fabricated on a common substrate. The circuit comprises two electrically adjustable matched transistor pairs. A first matched transistor pair comprises an adjusting transistor and a differential pair transistor. A second matched transistor pair also comprises an adjusting transistor and a differential pair transistor. Each of the matched transistor pairs share an insulated gate or electrically connected insulated gates. Geometrical and electrical matching occurs as between the two adjusting transistors and the two differential pair transistors. The two differential pair transistors are electrically connected at the source terminals to form a differential circuit. A feedback loop is comprised of an amplifier, a fixed resistor and a current source or load.


REFERENCES:
patent: 5309009 (1994-05-01), Chao
patent: 5963084 (1999-10-01), Eschauzier
patent: 6133780 (2000-10-01), Chi

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