Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Delay controlled switch
Reexamination Certificate
1994-03-23
2001-02-13
Wambach, Margaret R. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Delay controlled switch
C327S142000, C327S143000
Reexamination Certificate
active
06188266
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an electrical signal delay circuit integrated in a monolithic IC and more particularly, to a circuit which outputs delay time.
In a conventional voltage detector circuit with delay function, a voltage detector circuit shown in the circuit block diagram of
FIG. 9
is known. Namely a comparator
902
compares a voltage supplied from a center tap of a resistor group connected between a positive power source V
DD
and a negative power source V
SS
, and standard voltage
901
. An output of the comparator
902
is delayed by an RC time constant circuit comprising a resistor
903
and a capacitor
904
.
However, the conventional voltage detector circuit with delay function has the following problem if it is integrated in a monolithic IC. Namely a resistor of several hundred megohm and a capacitor of several microfarad are needed for the delay of several hundred millisecond. It is impossible to form this large resistance and capacitance on a monolithic IC since no other resistor of several megohm and capacitor of several pico farad, even if these are maximum, can be commonly formed on the monolithic IC.
Although the resistor of several megohm and condenser of several pico farad are formed on the monolithic IC for the delay of several milliseconds, a voltage detector circuit integrated in a monolithic IC is not realized practically because of a large change of delay time by a temperature change of resistance value.
An object of the present invention is to provide an electric signal delay line circuit and a voltage detector circuit with delay function which is practical, has a good transfer characteristic and can be integrated in a monolithic IC for overcoming the conventional problem.
SUMMARY OF THE INVENTION
In order to overcome the above-noted problem, a main capacitor and sub-capacitor start to charge at the same time from the same current source in an electrical signal delay circuit in one embodiment of the present invention. When the main capacitor charges to a predetermined voltage, the main capacitor stops charging and starts to discharge. As the sub-capacitor completes charging, a comparator circuit is latched by the charge completion signal for generation of a constant delay time.
Also in the voltage detector circuit in another embodiment of the present invention, an RC time constant circuit comprising two groups of capacitors and resistors generates a time delay. In more detail, the voltage detector circuit comprises a transistor which charges a more charging capacitor until the voltage reaches power source voltage, a transistor which discharges another capacitor in charging till the voltage reaches ground voltage and a transistor which isolates two RC time constant circuits.
Also, at least two charge/discharge circuits with a capacitor may be formed in the voltage detector circuit of the present invention. Each capacitor charges alternately from current source. In detail, the first capacitor charges. The first comparator detects when the charge voltage of the first capacitor reaches a predetermined voltage value and at such time the first latch circuit starts to discharge the first capacitor and starts to charge the second capacitor at the same time. The second comparator starts to charge. The second capacitor detects when the terminal voltage reaches another predetermined voltage value and at that time the second latch circuit starts to discharge the second capacitor and starts to charge the first capacitor at the same time. A counter circuit counts the number of charge cycles of the first capacitor by the repeat of the above operation and generates an output signal when the count reaches the predetermined number of times. Namely the structure controls charge/discharge by feeding back the output of one charge/discharge circuit to another charge/discharge circuit. Also, in this aspect of the invention, the delay signal generating circuit comprises a counter circuit counting the number of charge cycles, voltage detector means detecting the charge/discharge voltage level of each charge/discharge means and latch means memorizing the output for a time.
Also, two capacitor groups each comprising two capacitors respectively, may be provided in the electric signal delay circuit. Each capacitor group charge/discharges alternately. In detail, while one capacitor group charges, other capacitor group discharges. The time delay is determined by multiplying the charge/discharge time of one charge cycle by the count value of the total number of cycles of charge/discharges. Namely, in this aspect of the invention, the delay circuit comprises a starter circuit setting up a starting timing of delay, the first and the second charge/discharge circuits charge/discharge in accordance with the signal of the starter circuit, delay signal generating circuit which detects the voltage level of each charge/discharge circuit and generates an electric signal after a predetermined delay time. Each charge/discharge circuit controls charge/discharge of each other in the delay signal generating circuit by an output of another charge/discharge circuit. Consequently, the charge/discharge of each circuit repeats, and the charge/discharge timing of each circuit is determined by the electric signal of each other circuit. Also, the starter circuit starts delay when power source voltage charges to the predetermined voltage. Moreover, the charge/discharge circuit comprises a capacitor and a constant current source connected to the power source in series. Also, the delay signal generating circuit comprises the voltage detector circuit detecting the output voltage of each charge/discharge circuit means and the counter counting the number of oscillations of the voltage detector circuit.
In the above-mentioned voltage detector circuit, it is possible to rapidly discharge even at low power source voltage because the discharge starts just after the charge of main capacitor and charge value of main capacitor is small.
Also in the present invention, delay of output signal which is equal to the product of one charge/discharge time by count value of the counter generates.
REFERENCES:
patent: 4260907 (1981-04-01), Winebarger
patent: 4503344 (1985-03-01), Brillhart
patent: 4591745 (1986-05-01), Shen
patent: 4614880 (1986-09-01), Go et al.
patent: 4698531 (1987-10-01), Jones
patent: 4885476 (1989-12-01), Mahabadi
Adams & Wilks
Seiko Instruments Inc.
Wambach Margaret R.
LandOfFree
Electrical signal delay circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrical signal delay circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical signal delay circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2576770