Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2004-10-01
2011-12-13
Williams, A O (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257SE23052, C257SE23114, C257SE25013, C257S685000, C257S777000, C257S723000, C257S786000, C257S784000, C257S737000, C257SE21001
Reexamination Certificate
active
08076763
ABSTRACT:
In example embodiment, there is an integrated circuit (IC) device (5) assembled in a package (5) having a plurality of die including a first device (20) and at least one additional device (30). The IC comprises a substrate (10). A first device die (20), having bonding pads including ground connections, is die attached to the substrate (10). An additional device die (30), having bonding pads including ground connections is disposed on top of the first device die (20). The additional device die is die attached to the first device die. The ground connections of the first device die are connected to the ground connections of the additional device die in order to minimize the electrical interference between the device dies. An additional feature of the embodiment is, ground connections of the first device are connected to the ground connections of the additional device with a conductive adhesive (25).
REFERENCES:
patent: 6232668 (2001-05-01), Hikita et al.
patent: 6713856 (2004-03-01), Tsai et al.
patent: 6762488 (2004-07-01), Maeda et al.
patent: 6803254 (2004-10-01), Park et al.
patent: 6815746 (2004-11-01), Suzuki et al.
patent: 2002/0050635 (2002-05-01), Ogura et al.
patent: 2003/0155635 (2003-08-01), Ishiyama
patent: 2004/0264390 (2004-12-01), Suzuki
patent: 2005/0006745 (2005-01-01), Nishimura
patent: 2007/0111384 (2007-05-01), Kinoshita et al.
patent: 2009/0059545 (2009-03-01), Shioga et al.
patent: 2011/0001240 (2011-01-01), Merilo et al.
patent: 2011/0068444 (2011-03-01), Chi et al.
patent: 0 740 343 (1996-10-01), None
patent: 2001 135777 (2001-05-01), None
patent: WO 03/046098 (2003-06-01), None
NXP B.V.
Williams A O
LandOfFree
Electrical shielding in stacked dies by using conductive die... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrical shielding in stacked dies by using conductive die..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical shielding in stacked dies by using conductive die... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4313567