Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1994-10-04
1996-01-09
Pellinen, A. D.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 91, 361111, H02H 322, H02H 900
Patent
active
054834074
ABSTRACT:
An electrical overstress protection apparatus and method includes the provision of an overstress element (22) comprised of a lamination including a conducting ground path (26) and a dielectric sheet (30) engaging discrete signal paths (16) connected to contacts (44), the sheet (30) containing holes (32) or pores or thread or fiber interstices filled with an electrical overstress protection material (36) with the sheet thickness and hole area in conjunction with area of signal and ground paths and characteristics of the material adapted to provide breakdown and clamping voltages via a path to ground from signal contacts to ground to protect components from excessive voltage levels. Electrical connectors (40,40', 40") incorporate the apparatus in different embodiments of housing (42,42') and contact (44) configurations.
REFERENCES:
patent: 2707223 (1955-04-01), Hollmann
patent: 3377531 (1968-04-01), Lindsay
patent: 4272754 (1981-06-01), Lou
patent: 4331948 (1982-05-01), Malinaric et al.
patent: 4333861 (1982-06-01), Aoki et al.
patent: 4371226 (1983-02-01), Brancaleone
patent: 4660907 (1987-04-01), Belter
patent: 4726638 (1988-02-01), Farrar et al.
patent: 4726991 (1988-02-01), Hyatt et al.
patent: 4729752 (1988-03-01), Dawson, Jr. et al.
patent: 4804332 (1989-02-01), Pirc
patent: 4853827 (1989-08-01), Hernandez
patent: 4911519 (1990-03-01), Burton et al.
patent: 4977357 (1990-12-01), Shrier
patent: 5011246 (1991-04-01), Corradetti et al.
patent: 5018989 (1991-05-01), Black et al.
patent: 5068634 (1991-11-01), Shrier
patent: 5089929 (1992-02-01), Hilland
patent: 5099380 (1992-03-01), Childers et al.
patent: 5140299 (1992-08-01), Andrews, Jr. et al.
patent: 5142263 (1992-08-01), Childers et al.
patent: 5150086 (1992-09-01), Ito
patent: 5189387 (1993-02-01), Childers et al.
patent: 5246388 (1993-09-01), Collins et al.
patent: 5248517 (1993-09-01), Shrier et al.
patent: 5260848 (1993-11-01), Childers
patent: 5262754 (1993-11-01), Collins
patent: 5278535 (1994-01-01), Xu et al.
U.S. Ser. No. 07/906,813 filed Jun. 30, 1992 to Collins et al. Abstract and drawings only.
Electromer Drawing No. FLX-XXB001, "Multi-Line ESD Protection Array for D-Submin Connectors", Revision E, Sep. 23, 1991; Electromer Corporation, Belmont, Calif.
Electromer Drawings No. PCE-SM01C010, "Specification Control Drawing", Revision TM, Apr. 11, 1991; Electromer Corporation, Belmont, Calif.
European Search Report on corresponding application; Jan. 3, 1994.
Anastasio Paul J.
Bunch John H.
Childers Richard K.
Collins Christopher J.
English James M.
Leja Ronald W.
Ness Anton P.
Pellinen A. D.
The Whitaker Corporation
LandOfFree
Electrical overstress protection apparatus and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrical overstress protection apparatus and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical overstress protection apparatus and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1306732