Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – For fault location
Reexamination Certificate
2011-04-19
2011-04-19
Nguyen, Hoai-An D (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
For fault location
C702S124000
Reexamination Certificate
active
07928737
ABSTRACT:
A circuit arrangement, system, and method to test a device with a plurality of pins for electric overstress and transient induced latch-up characteristics. The circuit arrangement includes an inverting operational amplifier with a unity gain to receive a triggering signal and supply an inverted signal to a power amplifier. The power amplifier transforms the inverted signal into a test signal, which is received by a ratio circuit. The test signal is further operable to test the electric overstress and transient induced latch-up characteristics of the device. The ratio circuit transforms the test signal into a ratio signal. The ratio signal has a voltage magnitude that corresponds to the current magnitude of the test signal. The test signal and ratio signal are measured to determine if, during testing, the device or a component of the device has failed.
REFERENCES:
patent: 5568054 (1996-10-01), Iino et al.
patent: 5910873 (1999-06-01), Boluna et al.
patent: 6611040 (2003-08-01), Gelsomini et al.
patent: 6781887 (2004-08-01), Gelsomini et al.
patent: 6807507 (2004-10-01), Kumar et al.
patent: 6930501 (2005-08-01), Bargstadt-Franke et al.
patent: 6943578 (2005-09-01), Sanda et al.
patent: 7181352 (2007-02-01), Iyer et al.
Kelly, et al., “Developing a Transient Induced Latch-up Standard for Testing Integrated Circuits”, Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1999, pp. 178-189.
ORYX Instruments Corp., “Triton: The Only Automated Wafer Level ESD or TLP Tester”, Product Brochure, Aug. 2005 (2 pages).
Thermo Electron Corporation, “KeyTek ZAPMASTER MK.4 Combination ESD & Latch-Up Test System”, product brochure, 2006 (2 pages).
Thermo Electron Corporation, “High Pin Count Rapid Relay-Based ESD & Latch-Up Test System for Evaluating Advanced IC Devices”, product brochure, 2006 (5 pages).
Thermo Scientific, “Thermo Scientific Orion”, product brochure, 2008 (2 pages).
Thermo Scientific, “Thermo Scientific EX11000”, product brochure, 2008 (2 pages).
Thermo Scientific, “Thermo Scientific Celestron”, product brochure, 2008 (4 pages).
Nguyen Hoai-An D
Wood Herron & Evans LLP
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