Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2002-03-28
2003-09-23
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S072000, C257S093000, C257S098000, C438S022000, C438S025000, C438S026000, C438S027000, C438S029000
Reexamination Certificate
active
06624444
ABSTRACT:
TECHNICAL FIELD
Embodiments of the present invention relate to integrated circuit packaging and, in particular, relate to integrated circuit packages with optical interconnects.
BACKGROUND INFORMATION
The manufacturing of electronic and optoelectronic integrated circuits (ICs) involves complex lithographic processes to form microscopic solid-state devices and circuits in semiconductor wafers. These lithographic processes typically include forming layers of material on the wafer, patterning the layers, doping the substrate and/or the patterned layers, and heat-treating (e.g., annealing) the resulting structures. These processes are repeated to build up the IC structure. The result is a wafer containing a large number of ICs.
A “wafer sort” is then performed, wherein each IC chip on the wafer is electrically tested for functionality. The wafer is then separated (“diced”) into the individual IC chips, which are then “packaged” individually or in groups for incorporation onto a printed circuit board (PCB) or a chip-on-board (COB).
An IC package is designed to provide physical and environmental protection for one or more IC chips, and electrical and/or optical interconnections with other IC chips or to a PCB. However, the typical IC chip has electrical leads in the form of pins or balls with a periodic spacing (pitch) on the order of a hundred microns, whereas a PCB has an electrical contact pitch on the order of a millimeter or so. Thus, when interfacing an IC chip to a PCB, a substrate package is typically provided between the IC chip and the PCB. The substrate package, also called an “interposer,” is a passive device containing integrated circuit wiring arranged to perform the spatial transformation between the IC chip leads and the PCB contacts.
As central processing units (CPUs) increase in speed, they need increasing amounts of power to operate. This requires passing a high current through the leads, which in turns requires low-resistance leads to reduce power dissipation. Alternatively, a greater number of leads may be employed to lower the total resistance and thus lower the power dissipation. A large power dissipation in the leads results in higher temperatures, which negatively impacts chip reliability. High-power CPUs also require many power decoupling capacitors to reduce the noise in the power delivery system. Thus, the package for a high-power CPU tends to be complicated and expensive.
REFERENCES:
patent: 5412748 (1995-05-01), Furuyama et al.
patent: 5751009 (1998-05-01), Anderson et al.
patent: 5834799 (1998-11-01), Rostoker et al.
Flynn Nathan J.
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Wilson Scott
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