Electrical isomorphism

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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Reexamination Certificate

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07373289

ABSTRACT:
Method and system for determining electrical isomorphism between two electrical networks are disclosed. In one embodiment, the method includes representing the circuit as a hierarchically-arranged set of branches. The hierarchically-arranged set of branches including a first branch that includes a first electrical network and a second branch that includes a second electrical network, where the first and second branches are interconnected in the graph through a third branch at a higher hierarchical level in the graph than the first and second branches. Next, the method determines whether the first and second electrical networks are electrically isomorphic networks. If the first and second electrical networks are determined to be electrically isomorphic networks, the first and second electrical networks are represented with a single electrically isomorphic network. The method further includes simulating the first and second electrical networks using the single electrically isomorphic network.

REFERENCES:
patent: 5313398 (1994-05-01), Rohrer et al.
patent: 5446676 (1995-08-01), Huang et al.
patent: 5553008 (1996-09-01), Huang et al.
patent: 6031986 (2000-02-01), Milsom
patent: 6086626 (2000-07-01), Jain et al.
patent: 6577992 (2003-06-01), Tcherniaev et al.
patent: 6665845 (2003-12-01), Aingaran et al.
patent: 7024652 (2006-04-01), McGaughy et al.
patent: 7181383 (2007-02-01), McGaughy et al.
patent: 2005/0165595 (2005-07-01), Teig et al.
Webster's II New Riverside University Dictionary, 1994, Houghton Mifflin Company, pp. 646-647.
Celestry Design Technologies, Inc. (2001).Celestry BSIM Pro+™ Basic Operations, User Manual, Version 2001.3, Table of Contents, pp. iii-xiii.
Celestry Design Technologies, Inc. (2001).Celestry BSIM Pro+™ Device Modeling Guide, User Manual, Version 2001.3, Table of Contents, pp. iii-xii.
Feldman, P. et al. (May 1995). “Efficient Linear Circuit Analysis by Pade Approximation via Lanczos Process,”IEEE Transactions on CAD, 14(5):639-649.
Kerns, K. et al. (1996). “Stable and Efficient Reduction of Large Multiport RC Networks by Pole Analysis via Congruence Transformations,”IEEE/ACM DAC, pp. 280-285.
Pillage, L.T. et al. (Apr. 1990). “Asymptotic Waveform Evaluation for Timing Analysis,”IEEE Transactions on CAD, 9(4):352-366.
U.S. Appl. No. 10/724,277, filed Nov. 26, 2003, by McGaughy et al.
U.S. Appl. No. 10/993,686, filed Nov. 19, 2004 by McGaughy et al.
Van der Spiegel, J. (1995). “SPICE—A Brief Overview,” located at http://www.seas.upenn.edu/˜jan/spice/spice.overview.html, last visited on Mar. 8, 2005, 19 pages.

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