Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
1998-09-14
2001-02-20
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C438S423000
Reexamination Certificate
active
06191464
ABSTRACT:
The present invention relates generally to the electrical isolation of components within an integrated opto-electronic device where two or more active regions are optically coupled, for example by a waveguide. The invention particularly relates to isolation of a distributed feed-back (DFB) laser diode and an electro-absorption (EA) modulator in a monolithically integrated opto-electronic transmitter device for a fibre-optic telecommunications link.
Opto-electronic integration gives the potential for low cost, reliable and compact components, improved temperature and mechanical stability, and assured alignment between components. In the field of transmitter devices for fibre-optic communications, the integration of a laser diode with a modulator, for example in a buried heterostructure or a ridge stripe, was achieved many years ago, for example see the publication by S. Tarucha and H. Okamoto in Appl. Phys. Lett., vol. 22, pp. 242-243, 1986 relating to a device fabricated from GaAs. Nowadays, in order to achieve operation at 1.55 &mgr;m, such integrated opto-electronic transmitter devices are usually fabricated from on a wafer grown from an n
++
-InP substrate on which are grown a number of layers, including a p
+
-InP active layer capped by a p
++
-GaInAs ternary or cap layer. The cap layer has a relatively low resistance, and so serves as a contact layer to which electrical contacts may be made.
Ideally, the light output from the laser diode should have a steady wavelength and intensity. However, because of the integrated nature of such structures, and close physical proximity of the components, the electrical resistance between the laser diode and modulator (referred to herein as the isolation resistance) will be about 1-10 k&OHgr;, depending on the conductivity of the p-contact material and the separation of the contacts. It is therefore possible that the electrical signal used to modulate the modulator can inadvertently affect the laser diode, causing wavelength and/or intensity shifts. The isolation resistance therefore needs to be increased, at least to a few 100 k&OHgr;, and preferably to a few M&OHgr;.
Several approaches have been suggested to deal with this problem of electrical isolation. One approach is to etch through the ternary cap layer. This increases the isolation resistance only to about 10-20 k&OHgr;. Although such etching does not interfere with the optical waveguide between the laser diode and the modulator, this is insufficient isolation.
One way to achieve sufficient isolation is disclosed in the publication by M. Suzuki et al in the Journal of Lightwave Technology, vol. 6, pp. 779-785. An isolation region is formed in the stripe, between the DFB laser diode and the EA modulator, by etching away both the cap and active layers. The gap in the active layer was then filled with a passivating SiN film and a polyimide. Although a relatively high isolation resistance of 2.5 M&OHgr; was achieved, this approach suffers from the disadvantage of cutting into the optical waveguide between the laser diode and modulator, which may adversely affect the optical efficiency of the device or reduce coupling between the components owing to unwanted internal reflections.
Another way to achieve a high degree of electrical isolation, without etching away the cap and active layers and without adversely affecting the optical performance of the device, is to use deep proton implantation in the region between the laser diode and the modulator. M. Aoki and H. Sano have reporting in “OFC '95 Optical Fibre Communication, Summaries of Papers Presented at the Conference on Optical Fibre Communication, vol. 8, pp. 25-26, pub. Optical Society of America 1995”, that this technique can achieve an electrical isolation of greater than 1 M&OHgr;. It is believed that this approach could achieve an isolation resistance of up to 10 M&OHgr;. However, none of the other process steps associated with the fabrication of such an integrated opto-electronic device require any such proton or ion implantation, and so this approach requires an investment in an additional item of very expensive production equipment.
According to the invention, there is provided an integrated opto-electronic device, comprising at least two opto-electronic components fabricated on the same substrate, two of the components being: separated by an electrical isolation region; linked optically across the isolation region by a waveguide; and capped by a contact layer through which ohmic contacts are made to operate the components, characterised in that the contact layer extends to the isolation region from which a grounding contact is made to ground the contact layer in the isolation region and so electrically isolate the two components from each other.
The grounding contact may then draw any stray currents from one of said two components which could adversely affect the performance of the other of said component. In the case of the component being a laser diode, and the other component being a modulator, for example an EA modulator, for modulating the output of the laser diode, stray modulation currents at the modulation frequency may be drawn to the grounding contact in order to prevent wavelength or intensity chirping of the otherwise steadily biased laser diode.
The contact layer may be broken or cut through, at least partially, in order to help block current flow from one component to another component. Preferably, however, the contact layer extends contiguously in the isolation region between said two components.
In a preferred embodiment of the invention, a passivating layer covers the cap layer in order to provide environmental protection for the device. The passivating layer may then have contact windows in the passivating layer through which the contacts are made.
In general, the integrated device will have a ground plane, for example either the substrate or a layer grown on the substrate. In many cases, the device will be fabricated so that the substrate is a ground plane. The grounding contact from the cap layer may then be made to the ground plane. If a contact window is provided to the substrate, then the grounding contact may conveniently be made through this window to the ground plane. It would however, be possible for the grounding contact to be made, for example by a wire, or some other suitable grounding point. The ground plane need not necessarily be a zero volts with respect to the earth, but will be at a suitable potential with respect to the components in order to draw stray currents away from one or more of the components. However, it may be the case that at least one of the components is grounded by the ground plane.
It may often be the case that a passivating layer extends over the device, and in a preferred embodiment of the invention, this device passivating layer is contiguous with the cap passivating layer. The window to the substrate may then extend through the device passivating layer in order to provide a convenient route to the ground plane.
It may be convenient to fabricate one or each of the contacts by depositing a conducting layer, rather than by using wires. This deposited conducting layer may then cover over one or more windows. Preferably the contacts are deposited so that the contacts cover over fully all of the contact windows. The deposited conducting layer(s) may then act as a type of passivating layer in the area of the windows not otherwise protected by the aforementioned passivating layer.
It may be desirable to limit the stray currents drawn by the grounding contact, for example in order to prevent overheating due to ohmic losses, or to avoid a voltage drop for the components. Therefore, a resistance may be provided in line with the current path to ground. At least part of this resistance may conveniently be provided by the cap layer, which may be fabricated with dimensions depending on the material of the cap layer to give at least 1 k&OHgr; between a component and the ground contact.
REFERENCES:
patent: 5067809 (1991-11-01), Tsubota
patent: 548155
Hewlett--Packard Company
Lee Calvin
Smith Matthew
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