Electrical isolation of monolithic circuits using a...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S778000, C257SE21577

Reexamination Certificate

active

07550853

ABSTRACT:
A monolithic electronic chip including: a substrate; a first circuit formed on a first circuit portion of the substrate; a second circuit formed on a second circuit portion of the substrate; and at least one conductive impedance tap formed a through-hole in the substrate. The substrate includes first and second opposing surfaces and at least one through-hole extending from the first surface to the second surface. Each of the circuit portions is disposed on one or both of the opposing surfaces. Each conductive impedance tap is coupled to the surface of the through-hole it is formed in to electrically couple the substrate to a reference voltage. The impedance between each circuit and the reference voltage via the conductive impedance tap(s) is less than the crosstalk impedance between the first circuit and the second circuit via the substrate.

REFERENCES:
patent: 5955789 (1999-09-01), Vendramin
patent: 6747216 (2004-06-01), Brist et al.
patent: 7045412 (2006-05-01), Sugii et al.
patent: 2006/0057793 (2006-03-01), Hatori et al.
patent: 2007/0145489 (2007-06-01), Yeh et al.
patent: 2008/0036061 (2008-02-01), Chainer
patent: 2008/0067656 (2008-03-01), Leung et al.
S. M. Sinaga et al., “On-Chip Isolation in Wafer-Level Chip-Scale Packages: Substrate Thinning and Circuit Partitioning by Trenches”.
Tallis Blalack et al., “On-chip RF Isolation Techniques”, IEEE BCTM, 2002, 12.1, pp. 205-211.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Electrical isolation of monolithic circuits using a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrical isolation of monolithic circuits using a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical isolation of monolithic circuits using a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4060242

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.