Electrical interface for memory connector

Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...

Reexamination Certificate

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C439S077000, C439S079000, C361S803000

Reexamination Certificate

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07458821

ABSTRACT:
According to some embodiments, a connector to receive a memory module includes a first row of a first plurality of interconnect ends, a second row of a second plurality of interconnect ends adjacent to the first row, and a third row of a third plurality of interconnect ends adjacent to the second row. An interconnect end of the first plurality of interconnect ends, an interconnect end of the second plurality of interconnect ends, and an interconnect end of the third plurality of interconnect ends may be substantially aligned.

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patent: 6821144 (2004-11-01), Choy
patent: 6830470 (2004-12-01), Lynch et al.
patent: 6934163 (2005-08-01), Dow
patent: 7362589 (2008-04-01), Gay
patent: 2006/0221590 (2006-10-01), Campini et al.

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