Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2007-08-08
2009-06-23
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S510000, C438S597000, C257SE21170, C257SE21593, C257SE21218, C257SE21229, C257SE21498
Reexamination Certificate
active
07550323
ABSTRACT:
A metal layer is deposited on the patterned semiconductor material layer containing a cathode semiconductor portion, a fuselink semiconductor portion, and an anode semiconductor portion. The metal layer may be patterned so that a middle portion of the fuselink semiconductor portion has a thin metal layer, which upon annealing produces a thinner metal semiconductor alloy portion than surrounding metal semiconductor alloy portion on the fuselink semiconductor portion. Alternatively, a middle portion of the metal semiconductor alloy having a uniform thickness throughout the fuselink may be lithographically patterned and etched to form a thin metal semiconductor alloy portion in the middle of the fuselink, while thick metal semiconductor alloy portions are formed on the end portions of the fuselink. The resulting inventive electrical fuse has interfaces at which a thinner metal semiconductor alloy abuts a thicker metal semiconductor alloy in the fuselink to enhance the divergence of electrical current.
REFERENCES:
patent: 4679310 (1987-07-01), Ramachandra et al.
patent: 5365105 (1994-11-01), Liu et al.
patent: 5955275 (1999-09-01), Kamb
patent: 5969404 (1999-10-01), Bohr et al.
patent: 6204132 (2001-03-01), Kittl et al.
patent: 6274440 (2001-08-01), Arndt et al.
patent: 6326289 (2001-12-01), Rodder et al.
patent: 6384664 (2002-05-01), Hellums et al.
patent: 6507087 (2003-01-01), Yu
patent: 6642601 (2003-11-01), Marshall et al.
patent: 6661330 (2003-12-01), Young
patent: 6958523 (2005-10-01), Babcock et al.
patent: 6982610 (2006-01-01), Govind
patent: 6984550 (2006-01-01), Yamazaki et al.
patent: 2003/0160297 (2003-08-01), Kothandaraman et al.
Chidambarrao Dureseti
Henson William K.
Kim Deok-kee
Kothandaraman Chandrasekharan
Abate Esq. Joseph P.
International Business Machines - Corporation
Nhu David
Scully , Scott, Murphy & Presser, P.C.
LandOfFree
Electrical fuse with a thinned fuselink middle portion does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrical fuse with a thinned fuselink middle portion, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical fuse with a thinned fuselink middle portion will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4081283