Electrical field alignment vernier

Details Electrical field alignment vernier Electrical field alignment vernier

2006-01-10

2006-01-10

Potter, Roy (Department: 2822)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Electrical characteristic sensed

C438S014000, C438S018000

Reexamination Certificate

active

06984531

ABSTRACT:
A test structure pattern includes a first comb having a first set of tines, and a second comb having a second set of tines of the same width and spacing as the first set of tines. When the test structure pattern is stepped between fields on a wafer, the first comb and the second comb at least partially overlap on photoresist over a scribe lane between the fields. When the photoresist is developed, the overlap of the first comb and the second comb generates a metal comb. Electrical continuity is checked for the metal tines of the metal comb to determine the misalignment of the fields.

REFERENCES:
patent: 5250704 (1993-10-01), Van Le et al.
patent: 6399400 (2002-06-01), Osann, Jr. et al.
patent: 6680484 (2004-01-01), Young
patent: 6696849 (2004-02-01), Ban et al.

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