Electrical device and method

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S414000, C257S687000, C257S698000, C257S724000, C257S725000, C257SE23128, C257SE23011, C257SE23067, C257SE23125, C257SE23169, C438S109000

Reexamination Certificate

active

07847387

ABSTRACT:
An electrical device and method is disclosed. One embodiment provides a substrate, a sensor chip disposed completely above a plane section of a surface of the substrate. A structurally homogeneous material layer is disposed above the substrate and the sensor chip. A cavity is formed between the substrate and the material layer. The sensor chip is disposed inside the cavity.

REFERENCES:
patent: 6351390 (2002-02-01), Mayer et al.
patent: 2002/0149298 (2002-10-01), Furukawa et al.
patent: 2004/0166335 (2004-08-01), O'Regan et al.
patent: 2004/0209387 (2004-10-01), Hong
patent: 2005/0001331 (2005-01-01), Kojima et al.
patent: 2005/0012188 (2005-01-01), Val
patent: 2006/0205119 (2006-09-01), Appelt et al.
patent: 2008/0015421 (2008-01-01), Penner
patent: 2008/0156095 (2008-07-01), Tsuji et al.

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