Electrical data pulse slicing

Details Electrical data pulse slicing Electrical data pulse slicing

1980-04-18

1982-11-09

Murray, Richard

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

375 76, H04N 708

Patent

active

043587909

ABSTRACT:
A method of and an arrangement for slicing data in the form of a bi-amplitude data pulse signal comprising a sequence of clock pulses followed by a sequence of data pulses. The absolute mean amplitude of the sequence of clock pulses is used as the slicing level for the sequence of data pulses. As shown in FIGS. 3(a) to 3(d) and FIG. 5, the slicing level s is produced by an integrator 22,23 in response to a difference signal v-d'. The signal v is the incoming data pulse signal and the signal d' is a modified sliced data pulse signal which is produced by a multiplier 25. The multiplier 25 is fed by a sliced data pulse signal d and an amplitude correction factor a which is twice the difference between the black level amplitude and the mean of the amplitude of the sequence of clock pulses.

REFERENCES:
patent: 4222073 (1980-09-01), Hirashima

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