Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2000-06-08
2004-04-27
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S697000, C257S784000
Reexamination Certificate
active
06727579
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The invention relates to contact structures for making electrical connections to, from and between electronic components, especially microelectronic components and, more particularly, to contact structures exhibiting resiliency and/or compliance.
BACKGROUND OF THE INVENTION
Due to its superior conductive and non-corrosive characteristics, gold is a “material of choice” for making electrical connections between electronic components. For example, it is well known to make a plurality of wire bond connections between conductive pads on a semiconductor die and inner ends of leadframe fingers. This is cited as one example of making permanent connections between a first, “active” electronic component (the die) and a second “passive” electronic component (the leadframe).
The present invention advantageously employs wire-bonding equipment in which, generally, wire (e.g., gold wire) is supplied from a spool through a capillary (also referred to as a “bonding head”) and is bonded to a substrate. Generally, the nature of the bonding head will be determined by the nature of the bond to be made thereby. When the bonding head is for making a ball bond, it will generally be a “capillary”. When the bonding head is for making a wedge bond, it will generally be a “wedge”, these terms having recognized meanings in the art. To simplify matters, in the main hereinafter, the term “capillary” will be employed to indicate a bonding head suitable for making either ball or wedge bonds, applying thermal energy and/or compression during bonding.
The following U.S. patents (cited, when applicable, by patent number, first named inventor, month/year of issue, and U.S. Class/Subclass), incorporated by reference herein, are indicative of the state of the art of wirebonding:
(a) U.S. Pat. No. 5,110,032 (Akiyama, et al.; May 1992; USCL 228/102), entitled METHOD AND APPARATUS FOR WIRE BONDING, discloses wire (13) supplied from a wire spool (12) through a capillary (10). (In this patent, the wire 13 is insulated.) A control unit (20) is shown which includes a CPU (processor) and a memory unit (storage for software commands). The control unit exercises control over movement of the capillary, and over a discharge power circuit (18) which, in conjunction with a discharging electrode (17) is used to sever the wire with a discharge voltage.
(b) U.S. Pat. No. 3,460,238 (Christy, et al.; August 1969; USCL 227/111), entitled WIRE SEVERING IN WIRE BONDING MACHINES, is directed to a technique whereby the wire severing operation in a wirebonder comprises moving the bonding needle (or “capillary”, as used herein) with holding pressure sufficient to frictionally engage the wire and insufficient to deform the wire away from the bond area. This patent is cited as exemplary of the fact that wire-bonding has been known for decades, and also of the fact that it is generally undesirable to “deform” the wire while moving the capillary.
(c) U.S. Pat. No. 5,095,187 (Gliga; March 1992; USCL 219/68), entitled WEAKENING WIRE SUPPLIED THROUGH A WIRE BONDER, discloses wire-bonding techniques wherein a wire is bonded to a contact on an electronic component by the application of one or a combination of heat, pressure and vibration. This patent discusses weakening or severing the wire by localized application of heat, and how the severing operation may result in a broadened portion on the severed end of the wire. The severing heat may be applied to the wire by means of an electrode from which an electric field can be made to extend to the wire such that an arc is created between the electrode and the wire. This patent describes a severing technique wherein a first portion of the arc is of a first polarity for weakening of the wire, and a second portion of the arc is of a reverse polarity for controlling dispersion of charged particles emitted from the wire.
(d) U.S. Pat. No. 4,860,433 (Miura; August 1989; USCL 29/605), entitled METHOD OF MANUFACTURING AN INDUCTANCE ELEMENT, discloses a technique of winding a coil of fine copper wire on a spool member on a substrate. The copper wire is insulated. It is known that the insulation will be removed from the end of the wire when an electronic flame off (EFO) spark severs the wire, such as at the conclusion of making a previous bond. An end portion of the wire is bonded to a conductive path on the substrate. Then, either the capillary or the substrate is rotated, and a table supporting the substrate may be moved in the vertical direction, to wind the coil of fine copper wire on the spool member. Finally, an opposite end portion of the wire is bonded to another conductive path on the substrate.
Packaging is another milieu (field of endeavor) wherein it is important to effect a plurality of electrical connections between a first electronic component and a second electronic component. For example, in a ceramic package, a semiconductor die is disposed in a cavity in a ceramic package and (typically) wire-bonded to conductive traces extending into the cavity. A plurality (e.g., an array) of pins are disposed on an external surface of the package, and the pins connected by internal traces (patterned conductive layers) and vias to the conductive traces extending into the cavity. The package may then be mounted to a printed circuit board (PCB) having a corresponding plurality (e.g., array) of holes, each hole receiving a corresponding one of the package pins. The pins are typically soldered to the plated-through holes in the PCB to effect a permanent connection between the first electronic component (the packaged semiconductor device) and the second electronic component (the PCB). Alternatively, the package may be received by a socket having a corresponding plurality (e.g., array) of holes, each hole receiving one of the package pins, to effect a temporary connection between the first electronic component (packaged semiconductor device) and the second electronic component (socket).
It is generally well known to protect semiconductor devices against moisture. To this end, various packages exhibit various degrees of hermeticity—ceramic packages generally providing superior protection against the environment at relatively high cost, plastic (e.g., resin) and PCB-type (encapsulated) packages exhibiting relatively poor protection against the environment at relatively low cost, to name a few. In order to have the “the best of both worlds”—namely good hermeticity at low cost, it is known to coat bond wires and their surrounding connections (to the die and to a leadframe, e.g.). One example is found in U.S. Pat. No. 4,821,148 (Kobayashi. et al., April 1989; USCL 361/392), entitled RESIN PACKAGED SEMICONDUCTOR DEVICE HAVING A PROTECTIVE LAYER MEAD OF A METAL-ORGANIC COMPOUND. In this patent, a silver electrode (4) on a leadframe (2) is bonded to an aluminum electrode (5) on a silicon chip (1). The resulting assembly is immersed in a solution of benzotriazole (BTA) in ethyl alcohol. An Ag-BTA film is formed on the surface of the silver electrode, an Al-BTA film is formed on the surface of the aluminum electrode, and a Cu-BTA film is formed on the surface of the copper wire. These three metal-BTA films protect the wire and the electrodes from damage by (environmental) dampness. Notably, in this patent, it is immaterial, at best, whether the metal-BTA films are conductive, interconnection (of die to leadframe) having previously (prior to coating) been achieved by the wire bond itself. Preferably, such a “hermetic” coating would not be conductive, as it would tend to short out the device (die).
Pins, i.e. elongated rigid electrically-conductive elements, are well known, and are generally brazed to pads on electronic packages (including chip carriers).
U.S. Pat. No. 3,373,481 (Lins, et al.; March 1968; USCL 29/471.3), entitled METHOD OF ELECTRICALLY INTERCONNECTING CONDUCTORS, discloses forming pin-like gold pedestal structures (13) atop terminal portions (12) of an integrated circuit device (10) by thermocompressing gold spheres (13, see FIG. 2) and shaping the spheres with a heated vacu
Eldridge Benjamin N.
Grube Gary W.
Khandros Igor Y
Mathieu Gaetan L.
Burraston N. Kenneth
FormFactor Inc.
Merkadeau Stuart L.
Potter Roy
LandOfFree
ELECTRICAL CONTACT STRUCTURES FORMED BY CONFIGURING A... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with ELECTRICAL CONTACT STRUCTURES FORMED BY CONFIGURING A..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ELECTRICAL CONTACT STRUCTURES FORMED BY CONFIGURING A... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3274498