Patent
1980-05-05
1981-06-02
James, Andrew J.
357 59, 357 68, 357 71, 357 51, 357 86, 357 23, H01L 2348, H01L 2946, H01L 2962
Patent
active
042714249
ABSTRACT:
Disclosed herein is an improvement for the electrode structure of the MIS type semiconductor integrated circuit, in which the ohmic contact with the Si substrate is formed on the top of the semiconductor chip. The electrodes which consist of an upper Al layer and a lower polycrystalline Si layer are used for a drain electrode and a source electrode. These electrodes should be isolated from the substrate by the underlying PN junction. Another electrode, for connecting to the substrate consists of an Al layer directly in contact with the underlying N type region and which is short circuited with the substrate through the N type region due to the alloy formation between the Al and the substrate material. An MIS type semiconductor device with a grounded substrate or with a back gate bias is obtained in a simple structure by the improved source and drain electrode structure.
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Inayoshi Katsuyuki
Miyao Kazutoshi
Fujitsu Limited
James Andrew J.
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