Electrical connectors – Aligning means for dual inline package
Reexamination Certificate
2003-04-03
2003-12-09
Ta, Tho D. (Department: 2833)
Electrical connectors
Aligning means for dual inline package
C439S680000
Reexamination Certificate
active
06659795
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electrical connector for electrically connecting an electronic package such as a land grid array (LGA) chip with a circuit substrate such as a printed circuit board (PCB), and particularly to a connector having retention posts that securely position the electronic package therein.
2. Description of the Prior Art
Land grid array (LGA) electrical connectors are widely used in the connector industry for electrically connecting LGA chips to printed circuit boards (PCBs) in personal computers (PCs). As described in “Nonlinear Analysis Helps Design LGA Connectors” (Connector Specifier, February 2001, pp. 18-20), the LGA connector mainly comprises an insulative housing and a multiplicity of electrical terminals. The housing comprises a multiplicity of terminal passageways defined therein in a generally rectangular array for interferentially receiving corresponding terminals. Due to the very high density of a terminal array that an LGA chip may have, the LGA chip needs to be precisely seated onto the LGA connector to ensure reliable signal transmission between the terminals and the LGA chip. Means for accurately attaching the LGA chip to the LGA connector are disclosed in U.S. Pat. Nos. 5,192,213, 5,199,889, 5,232,372, 5,320,559 and 5,362,241.
Referring to
FIG. 5
, a conventional LGA connector
6
comprises an insulative housing
60
, a multiplicity of terminals
61
received in the housing
60
, and a load plate
62
and a cam lever
63
pivotably mounted on two opposite ends of the housing
60
. The load plate
62
defines a channel
620
receiving the cam lever
63
. To mount an LGA chip (not shown) on the LGA connector
6
, the load plate
62
is rotated up until it is perpendicular to the housing
60
. The LGA chip is seated in the housing
60
, and is loosely engaged with the terminals
61
. The load plate
62
is rotated down so that it rests on the LGA chip. The cam lever
63
is rotated down until it engages in the channel
620
of the load plate
62
. When the cam lever
63
has reached the end of its travel, the load plate
62
presses the LGA chip into firm engagement with the terminals
61
of the connector
6
.
In the above-described assembly process, the load plate
62
presses the LGA chip between two opposite sides of the housing
60
of the connector
6
. Generally, a material of the housing
60
is not resilient, and the sides of the housing
60
cannot elastically deform under pressure from the LGA chip. If the LGA chip is wider than a distance between the opposite sides of the housing
60
, the housing
60
is liable to break. On the other hand, if the LGA chip is narrower than the distance between the opposite sides of the housing
60
, the LGA chip may be poorly positioned relative to the terminals
61
. This can adversely affect mechanical and electrical connection between the LGA chip and the connector
6
. Furthermore, when the load plate
62
presses the LGA chip to firmly engage with the terminals
61
, the housing
60
is liable to break if asymmetrical force is inadvertently applied thereto.
FIG. 6
shows another conventional LGA connector
6
′ devised to circumvent the above-described problems. The connector
6
′ comprises an insulative housing
60
′, and a multiplicity of terminals
61
′ received therein. In forming the connector
6
′, a carrier strip (not shown) is used. The carrier strip comprises a row of the terminals
61
′, and a row of connecting sections (not shown) respectively connecting the terminals
61
′ with a main body of the carrier strip. The housing
60
′ comprises four raised sidewalls
62
′, and a flat base
63
′ disposed between the sidewalls
62
′, The base
63
′ and the sidewalls
62
′ cooperatively define a space therebetween for receiving an LGA chip (not shown) therein. The base
63
′ defines a multiplicity of terminal passageways
64
′ for receiving the terminals
61
′ therein. When the LGA chip is seated on the LGA connector
6
′, the four sidewalls
62
′ can securely engage the LGA chip therebetween.
However, installation of terminals
61
′ into those passageways
64
near two of the sidewalls
62
′ is problematic. Once the terminals
61
′ have been inserted into such passageways
64
′, the connecting sections of the carrier strip must be cut from their corresponding terminals
61
′, Because the carrier strip is located close to the relevant sidewall
62
′, there is insufficient space to manipulate the carrier strip to allow easy cutting off of the connecting sections. Such manipulation is blocked by the sidewall
62
, which is liable to sustain damage as a result.
Therefore, a new LGA electrical connector which overcomes the above-mentioned problems is desired.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an electrical connector for electrically connecting an electronic package such as an LGA chip with a circuit substrate such as a PCB, whereby the electrical connector can facilitate secure positioning of the electronic package therein.
To achieve the above object, an LGA electrical connector for connecting a land grid array (LGA) chip with a printed circuit board (PCB) includes an insulative housing and a plurality of electrical terminals received in a plurality of passageways defined in the housing. Two cylindrical posts extend upwardly from two diagonally opposite corners of the housing respectively. Two recesses are defined in diagonally opposite corners of a bottom surface of the LGA chip respectively, corresponding to the posts. In assembly of the LGA connector with the LGA chip, the LGA chip is inserted into the LGA connector along a direction of assembly. The recesses interferentially receive the posts. Thus the LGA chip is securely mounted on the housing of the LGA connector. The posts of the LGA connector and the recesses of the LGA chip cooperate to precisely position the LGA chip on the LGA connector. This ensures that engagement between contact pads of the LGA chip and the terminals is highly accurate and reliable. In addition, the posts are sized differently from each other, and the recesses are correspondingly sized differently from each other. Accordingly, mismating of the LGA chip with the LGA connector is prevented.
REFERENCES:
patent: 5192213 (1993-03-01), Kosugi et al.
patent: 5199889 (1993-04-01), McDevitt, Jr.
patent: 5232372 (1993-08-01), Bradley et al.
patent: 5320559 (1994-06-01), Uratsuji et al.
patent: 5362241 (1994-11-01), Matsuoka et al.
patent: 5466171 (1995-11-01), Bixler et al.
patent: 5637019 (1997-06-01), Crane et al.
patent: 5833472 (1998-11-01), Bright
patent: 5839918 (1998-11-01), Matsuoka
patent: 0 443 492 (1991-08-01), None
Lai Ching-Ho
Laio Fang-Jwu
Chung Wei Te
Hon Hai - Precision Ind. Co., Ltd.
Ta Tho D.
LandOfFree
Electrical connector with retention posts does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrical connector with retention posts, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical connector with retention posts will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3094654