Electrical conduction array on the bottom side of a tester...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S765010, C324S757020, C714S710000, C365S225700

Reexamination Certificate

active

06784668

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor devices, and more particularly, to the testing thereof.
2. Discussion of the Related Art
FIG. 1
shows a plan view of a typical pin grid array semiconductor device
10
. The device
10
includes a substrate
12
on which is mounted a semiconductor processor
14
. Also mounted on the substrate
12
are a plurality of fuses L
1
, L
2
, L
3
, L
4
etc. (each of which may be blown by a laser) in operative association with various resistor packs R
1
, R
2
, R
3
etc. These fuses are used to configure the processor in various ways, for example the frequency of the processor, the voltage thereof, etc. As an example, the fuses L
2
, L
3
, L
4
are used to configure the frequency of the processor
14
. Each of the fuses L
1
(one shown in
FIG. 2
) is connected to a pin
16
of the device
10
, and is also connected to a BP pair
18
, i.e., (1) a fuse L
3
A connected in series with a resistor
20
, and (2) a fuse L
3
B connected in series with a resistor
22
, the fuse L
3
A and resistor
20
being in parallel with the fuse L
3
B and resistor
22
. Initially, either the fuse L
3
B is blown by a laser (FIG.
3
), or the fuse L
3
A is blown by a laser (FIG.
4
), the blowing of only fuse L
3
B resulting in a pull up on the BP pair
18
, Mile the blowing of only fuse L
3
A results in a pulldown on the BP pair
18
. Then, each fuse L
1
is blown by a laser to disconnect its associated BP pair
18
from the pin
16
(FIG.
5
). This ensures that the frequency of the processor
14
cannot be reconfigured thereafter.
Next, a laser level test is undertaken for verification that laser cutting of the fuses L
3
has been done correctly. However, because the fuse L
1
has been blown, the fuses of each BP pair
18
are no longer connected to a pin of the pin grid array device. Thus, a number of fuses cannot be accessed to verify their state.
What is needed is apparatus which allows fill testing of a device after a laser cutting process has been used to configure the device and pins of the device have been disconnected from internal circuitry thereof.
SUMMARY OF THE INVENTION
The present apparatus for testing an electrical device which includes fuses has a resilient, compressive, insulating base mounted to the underside of a thermal head. A plurality of conductive elements are mounted on the base, in parallel, adjacent but spaced apart relation. With the thermal head in close proximity to the electrical device, a number of the conductive elements are caused to be brought into contact with and bridge a fuse, so that connection is provided between one side of the fuse and the other.
The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings. As will become readily apparent to those skilled in the art from the following description, there is shown and described an embodiment of thus invention simply by way of the illustration of the best mode to carry out the invention. As will be realized, the invention is capable of other embodiments and its several detail are capable of modifications and various obvious aspects, all without departing from the scope of the invention. Accordingly, the drawing and detailed description will be regarded as illustrative in nature and not as restrictive.


REFERENCES:
patent: 4281888 (1981-08-01), Seaman
patent: 4698589 (1987-10-01), Blankenship et al.
patent: 5952838 (1999-09-01), Tikhonov
patent: 6215323 (2001-04-01), Rennies et al.
patent: 6250933 (2001-06-01), Khoury et al.
patent: 6252410 (2001-06-01), Fan
patent: 6545927 (2003-04-01), Muller
patent: 6586815 (2003-07-01), Ohhashi

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