Electrical circuit with a testing device for testing the...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S535000, C324S533000, C714S733000, C714S734000

Reexamination Certificate

active

06617869

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to an electrical circuit with a testing device for testing electrical connections in the electrical circuit. The invention is also directed to an electrical component having such an electrical circuit in integrated form. The present invention is also directed to a method for testing the quality of electrical connections in electrical circuits.
2. Description of the Related Art
It is known to test the quality of the connections of electronic assemblies with an in-circuit tester. An external tester is thereby connected to the assembly or assemblies under test with a needle bed adapted. Needles are mechanically positioned to measuring points—called measuring pads—that are already provided on the circuit. The testing points or, respectively, components are selected and provided with defined voltage levels via these mechanically placed and electrically driven needles. Faults are recognized by measuring and comparing the voltages at the output side of the measuring points to anticipated values.
These known testing methods have the disadvantage that the number of test pads to be separately provided increases greatly with the number of planned tests and the number of assemblies to be selected for a test. This particularly impedes the desired integration and high density of the assemblies on a printed circuit board. A needle mechanically placed onto a measuring point (test pad) requires a certain minimum size, since mechanical tolerances and the cost outlay for continued miniaturization must be taken into consideration. Special components, for example, components provided with cooling members, or large-scale integrated components having several 100 pins can therefore not be measured due to the limited space on the motherboard.
Given modern ball grid array (BGA) components that are characterized in that all connections to the printed circuit board are located under the component, it is practically impossible to provide test pads for all of these terminals without in turn destroying the advantages of this space-saving structure.
Furthermore, a mechanically high-precision and expensive needle bed adapter must be fabricated for each motherboard and must usually also be fabricated for different tests on the same motherboard. The fabrication takes a long time; this delays the development of a circuit, and the needle bed adapter is itself susceptible to malfunction.
It is also known to test circuits with a boundary scan test. Given this, a part of the test logic is integrated into the component. The basic idea is to insert a boundary scan cell as part of the integrated circuit itself between each pin terminal and the actual integrated circuit. A transmitter cell and a receiver cell is thereby needed for testing a connection. During the normal operating condition, the boundary scan cell transmits the received values from the input to the output. In the test mode, it reads the input value out and outputs a selectable test value at the output. All boundary cell scan test cells are connected to one another by a test bus. The data are connected on an external tester via this test bus during the test. The test bus standardized according to IEEE 1149.1 enables the test control and the data exchange.
What is disadvantageous about this Prior Art is that the method is dependent on external testing devices due to the extremely high calculating performance. Many test vectors are needed, i.e., sets of test values to be applied to the measuring points, with which, for example, a specific command is communicated to the circuit under test. As a result, a vector for the resulting values in turn is produced at the pins. In order to test the correct connections of the components to the printed circuit board, the functionality of specific elements and assemblies must be tested. To this end, however, many test vectors must be utilized and the result vectors that are obtained must be compared to the anticipated values. The external testing equipment must therefore provide a considerable calculating capacity; a separate computer is usually utilized for this purpose. Furthermore, when the results do not agree with the anticipated values, the result vectors usually contain little, if any, information about the nature of the fault.
None of the known testing devices can be completely integrated into a component in order to test electrical connections in the circuit in which they are employed. The quality of the connection can only be determined after a higher-ranking comparison, to which the values must be output and that usually does not take place on the electrical circuit itself but in one of the aforementioned external testing devices.
Consequently, it is not possible (or is possible only with significant expenditure) to integrate self-tests into the circuits. But this integration will be required for future assemblies and circuits.
As a self-test (during the service life) of a circuit, the implementation of a logic test has been previously known, by which a “program” is run in agreement with the normal function and, for the anticipated, “correct” results, it is assumed that the circuit is okay overall.
In addition, it is also known to find interruptions in transmission lines such as coaxial lines in that a signal is reflected at the fault location and the point of the interruption is determined from the signal propagation time.
SUMMARY OF THE INVENTION
The invention is therefore based on the object of offering an electrical circuit that does not require any external testing equipment for testing the quality of electrical connections on the circuit and that nonetheless enables a determination of the quality of the electrical connections in a simple way. A further object of the present invention is to offer a corresponding method for testing the quality of electrical connections in electrical circuits.
The above-described object is inventively achieved by an electrical circuit comprising a testing device for testing electrical connections quality in the electrical circuit, a test signal generator for generating a test signal and supplying the generated test signal to an electrical connection to be tested, an evaluator for receiving a reply signal from the connection under test in response to a supplied the test signal, the evaluator being configured for registering a propagation time between test signal and reply signal, and comparing the reply signal to an anticipated signal, and evaluating a quality of the tested electrical connection on a basis of the propagation time and the signal comparison.
The object of the invention is also achieved by a method for testing a quality of electrical connections in electrical circuits, comprising the steps of generating a defined test signal, supplying the generated test signal to an electrical connection to be tested, receiving a reply signal from the connection under test in response to the supplied test signal, determining a propagation time between the test signal and the reply signal; and comparing the reply signal to an anticipated signal for evaluating a quality of the electrical connection.
The inventive electrical circuit comprises a testing device composed of a test signal generator for generating a test signal and supplying this test signal to an electrical connection to be tested.
Furthermore, an evaluator is provided for the reception of a reply signal to a supplied test signal by the connection to be tested, by which the evaluator registers the propagation time between a test signal and a reply signal, compares the reply signal to an anticipated signal, and evaluates the quality of the tested electrical connection on the basis of the propagation time and of the signal comparison.
Advantageously, the effect of the modification of an electrical signal or pulse during the signal run that is otherwise undesired in digital circuits is precisely what is used. What is exploited is the fact that electrical connections are not ideal and one can only approximately assume an ideal transm

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