Electrical circuit arrangements responsive to serial digital sig

Telegraphy – Systems – Line-clearing and circuit maintenance

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328 72, H04L 700

Patent

active

040356019

ABSTRACT:
Envisages the use of a format of serial digital signalling in which each data word comprises a predetermined number of bytes formed by bits of substantially uniform duration and in which each byte comprises a "start" bit of a first binary significance (e.g. 0) a "stop" bit having a second binary significance (e.g. 1) and an identical plurality of "data" bits immediately succeeding said "start" bit and in which the final byte of the data-word is characterized in that it has an additional bit having said first binary significance 0 interposed between last "data" bit and the "stop" bit thereof. The reading of that bit immediately succeeding the last "data" bit of each byte of each data-word of a transmission produce a so-called synchronizing pulse-sequence comprising bits of said second significance for all bytes except that last and a bit of said first significance for the last byte.
A response circuit is provided normally to maintain byte-to-byte synchronization. If de-synchronization is detected the data-word involved is completely cancelled and the circuit is set for re-synchronization preparatory to commencement of next data-word.

REFERENCES:
patent: 3730998 (1973-05-01), Schmidt et al.
patent: 3883729 (1975-05-01), DE Cremiers

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