Electrical circuit arrangement and electrical circuit unit for u

Details Electrical circuit arrangement and electrical circuit unit for u Electrical circuit arrangement and electrical circuit unit for u

1985-03-20

1987-02-10

Shoop, Jr., William M.

Electrical transmission or interconnection systems

Plural load circuit systems

Selectively connected or controlled load circuits

307 40, 307 41, H02J 100

Patent

active

046424733

ABSTRACT:
A circuit arrangement having a plurality of circuit units (1-l to 1-n) each circuit unit (1-l to 1-n) having an input AI and and output AO. Each circuit unit (1-l to 1-n) includes an address generator which is incremented by a clock signal applied via terminal. Incrementation of the clock generator is inhibited when a logical `1` is applied to the input AI of a circuit unit. In order to generate addresses for all the circuit units they are connected in a daisy chain with the AO output of each circuit unit being connected to the AI input of the next circuit in the chain. The circuit units (1-l to 1-n) are arranged so that when a logical `1` is applied to its AI input a logical `1` appears at its AO output one clock period later. A monitoring unit may be provided to detect when all addresses have been set up by monitoring the state of the AO output of the last circuit unit (1-n) in the chain. This arrangement enables unique addresses to be allocated to all the circuit units while allowing each of the circuit units to be manufactured in identical form.

REFERENCES:
patent: 4000487 (1976-12-01), Patterson et al.
patent: 4280199 (1981-07-01), Osakabe et al.
patent: 4458357 (1984-06-01), Weymouth et al.

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