Electrical arrangement having improved feedback stability

Amplifiers – With semiconductor amplifying device – Including signal feedback means

Reexamination Certificate

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C330S290000

Reexamination Certificate

active

06404286

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electrical circuit arrangement, comprising an output stage having an output terminal for delivering an output current, and at least one feedback circuit operatively connected to said output terminal.
An electrical circuit arrangement of this type is generally known from U.S. Pat. No. 5,315,266.
For obtaining a sufficient output current transient response and power ripple rejection, a capacitor is connected between the output terminal and signal ground, for example.
As will be appreciated by those skilled in the art, non-ideal capacitors can be represented by an equivalent series circuit comprising a capacitance, an equivalent series resistance (ESR) and an equivalent series inductance (ESL). At the so-called eigenfrequency of the capacitor, the capacitance and equivalent series inductance form a series resonant circuit having zero impedance. Accordingly, between the output terminal and signal ground an impedance equal to the equivalent series resistance remains.
In practice, capacitors are used having a relatively large capacitance value, for example 2.2 &mgr;F, and a very low equivalent series resistance. At the eigenfrequency of such a capacitor, the output terminal is effectively short circuited to signal ground, as a consequence of which the feedback circuitery is inoperative.
To avoid short circuiting of the output terminal, in the known circuit arrangement, a resistor or resistive element having a low resistance value is connected between the output terminal of the output stage and the capacitor. However, by such a resistor or resistive element, the output impedance of the circuit arrangement is undesirably increased. In particular, if the arrangement has to operate as a voltage or current control device and in those cases wherein the output stage has to operate like a switch, the output impedance at the output terminal should be as less as possible.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an electrical circuit arrangement of the type mentioned in the preamble, having an improved feedback stability while maintaining a low output impedance.
According to the invention, this is achieved by a current generator circuit, arranged for generating a current which is a fraction of the output current, wherein the current generator circuit connects by a resistive element to the output terminal, and a first feedback circuit connects via the resistive element to the output terminal.
During operation, in the circuit arrangement according to the invention, the current of the current generator circuit, which is a replica of the output current delivered by the output stage, causes a voltage drop across the resistive element, which voltage drop is a representation of the output voltage at the output terminal. In other words, the signal across the resistive element provides a copy of the signal at the output terminal for feedback purposes without increasing the output impedance of the circuit arrangement at the output terminal.
In a further embodiment of the invention by coupling the first feedback circuit to the resistive element through a capacitor or an element with capacitive action, the DC settings of the circuit are not influenced, while a high frequency feedback loop is achieved which remains operative even if the output terminal is short circuited or nearly short circuited at the eigenfrequency of an external capacitor connected to the output terminal. As a result, the circuit arrangement according to the invention can be controlled at high frequencies at or near the eigenfrequency of the capacitor and, compared to the prior art solution, with a larger open loop gain, i.e. lower output impedance.
In a yet further embodiment of the circuit arrangement according to the invention, a second feedback circuit connects by a resistive voltage devider to the output terminal, providing a low frequency DC feedback loop. In the circuit according to the invention, the accuracy of this low frequency DC feedback loop is not affected by an additional impedance at the output terminal.
As a whole, the electrical circuit arrangement according to the invention, with the first and second feedback circuitry enjoys an enhanced operation frequency bandwidth by the “virtual damping” introduced and which is not present in the output impedance at the output terminal of the arrangement.
In a practical embodiment of the invention, the fraction of the output current generated by the current generator circuit is less than 0.1 and, preferably, in the order of 0.01.
In a preferred embodiment of the invention, the output stage comprises a first field effect transistor and the current generator circuit comprises a second field effect transistor, wherein the W/L-ratio of the second field effect transistor divided by the W/L-ratio of the first field effect transistor equals the above fraction.
In a yet further embodiment, Metal-Oxide Semiconductor Field Effect Transistors (MOSFET's) are used for both the output stage and the current generator circuit, having their gates parallel connected, providing a control input of the output stage.
With the electrical circuit arrangement according to the invention, in further embodiments thereof, amplifier and voltage control circuits are provided.
The invention further relates to a method for delivering an output current by an electrical circuit arrangement comprising an output stage having an output terminal for delivering the output current, and at least one feedback circuit operatively connected to the output terminal, characterized by generating a current which is a fraction of the output current and adding same to said output current.


REFERENCES:
patent: 5121080 (1992-06-01), Scott et al.
patent: 5315266 (1994-05-01), Lorenz
patent: 5710522 (1998-01-01), Pass
patent: 5736900 (1998-04-01), Smith
patent: 5793255 (1998-08-01), Jesser
patent: 5986509 (1999-11-01), Lohninger
patent: 6268772 (2001-07-01), Chen

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