Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit
Reexamination Certificate
2002-03-05
2003-09-09
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Fusible link or intentional destruct circuit
C257S530000, C438S600000, C365S225700
Reexamination Certificate
active
06617914
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to the field of semiconductors and, more particularly, to programmable antifuse elements in semiconductor memory devices.
2. Description of the Related Art
Integrated circuits often require selectively programmable electrical connections between circuit nodes. Such connections can be implemented by use of an antifuse link which is programmable to interconnect electrodes. For example, antifuses are often used in memory cell arrays such as dynamic random access memories in which failing cell addresses are remapped to functional cell addresses by selective programming of antifuses.
Generally, antifuses are fabricated with conductive electrical terminals separated by a dielectric layer. In an “off” state, the anti-fuse has a high resistance between its terminals. The antifuse can be programmed to an “on” state (i.e., a low resistance) by breaking down the interposed dielectric to form a conductive link between the antifuse terminals as described in U.S. Pat. No. 5,257,222, entitled “Antifuse Programming By Transistor Snap-Back”.
Other currently applied antifuse types are structures based on a conventional MOS transistor. Here the MOS transistor is not used in the conventional sense, either as an amplifier or as a switching element, but as a configuration for realizing a dielectric layer (‘Gate—oxide’) interposed between the gate, source and drain. Such a transistor antifuse is programmed or “blown” by applying a sufficient field or “blow” voltage across the gate oxide of the MOS transistor. The blow process results in a damaged dielectric, which reduces the electrical resistance across the dielectric. Although this blow voltage must reach a threshold value for any breakage to occur in the dielectric, the final resistance resulting from this breakage is lowered if more energy is applied to the antifuse dielectric.
Evaluation circuits attached to the anti-fuse are used to differentiate between the high resistance of the intact oxide (R
off
) and the lowered resistance of the damaged oxide (R
on
) The larger the resistance of a programmed antifuse in a memory cell the harder it becomes to determine the status of the antifuse (blown versus unblown).
Typical values for R
off
are in the range of 10
12
ohms. The range of R
on
largely depends on the parameters during the blow process. High blow voltage and high blow current generally lead to lower R
on
resistances. However, it is desired to minimize those two parameters in order to reduce the size of the associated circuits (e.g. blow voltage generator, blow transistor, wiring, etc.). In current designs, a compromise is made to balance the minimum current needed to reliably blow the antifuse and the area requirements of the blow transistor device to handle that current. From that perspective, values of R
on
in the range of 10
5
ohms to 10
8
ohms are common. However, with this range of R
on
commonly used evaluation circuits are not able to accurately distinguish an unblown anti-fuse and a blown anti-fuse exhibiting the relatively high R
on
values. Thus, an antifuse may erroneously be detected as un-programmed if the blown antifuse resistance R
on
is sufficiently large.
Thus, there is a need for an improved approach to programming an antifuse which provides a more robust electrical connection which is readily verifiable and distinguishable from an un-programmed antifuse.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages as an apparatus, system and method of programming an antifuse comprising of a dielectric interposed between two conductive elements. One of the conductive elements is attached to a capacitor that is precharged to a set voltage. The antifuse is programmed to an “on” state by breaking down the interposed dielectric to form a conductive link between the antifuse terminals from the application of a programming voltage across the conductive elements. Responsive to the applied programming voltage, a field appears on the dielectric which leads to formation of conductive links across it. Electrical energy stored in the capacitor, in response to the formation of these conductive links, is immediately discharged through the links causing a more robust electrical connection between the conductive elements. A particular antifuse can be selected for programming, within an array of such devices, by applying the programming voltage only to the conductive elements of the selected antifuse. Further, the capacitor can be common to a plurality of antifuses in which the capacitor's stored energy is applied to a select one of the plurality of antifuses, rendered operable by the application of the programming voltage to the conducting elements of the selected antifuse.
REFERENCES:
patent: 5257222 (1993-10-01), Lee
patent: 5463244 (1995-10-01), De Araujo et al.
patent: 5793224 (1998-08-01), Sher
patent: 5896041 (1999-04-01), Sher et al.
patent: 6096580 (2000-08-01), Iyer et al.
patent: 6163488 (2000-12-01), Tanizaki et al.
patent: 2000-200498 (2000-07-01), None
Hideki Satake and Akira Toriumi, “Dielectric Breakdown Mechanism of Thin-SiO2Studied by the Post-Breakdown Resistance Statistics,”IEEE Transactions OnElectron Devices,, vol. 47, No. 4, pp. 741-745, Apr. 2000.
J.C. Jackson, Ö. Oralkan, T. Robinson and G. A. Brown, “The Non-Uniqueness of Breakdown Distributions in Silicon Oxides”,1997 IRW Final Report, IEEE, pp. 50-55.
Callahan Timothy P.
Englund Terry L.
Jackson Walker L.L.P.
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