Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
2000-11-21
2002-04-09
Dinkins, Anthony (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S309000, C361S763000
Reexamination Certificate
active
06370013
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wiring board where on electronic components such as LSI chips are mounted on the surface thereof and, more particularly, to a low-impedance wiring board having an electric element such as a capacitor incorporated in the wiring board.
2. Description of Related Art
Recently, as telecommunication apparatuses proliferate, electronic equipment operating at a high speed is increasingly used and accordingly demands for electronic packages capable of operating at high speeds are increasing. In order for a high speed operation, noises on electric signals must be minimized. This requires that passive electronic components such as capacitors be placed in proximity to active electronic components and that the wiring length of electronic circuits be minimized, thereby to reduce the inductance of the interconnection lines.
For example, Japanese Unexamined Patent Publication (Kokai) No. 7-142871 (1995) proposes that a bypass capacitor is formed between a planar pattern drawn from a power supply layer and a planar pattern drawn from ground layer. In this constitution, however, electromagnetic field concentrates in a small number of via hole conductors that are connected to a power supply layer formed inside of the wiring board or the planar electrode used to lead from the ground layer. There is also such a problem that increasing the number of the via hole conductors used in interconnection leads to a decrease in the capacity of the dielectric layer.
Japanese Unexamined Patent Publication (Kokai) No. 10-92966 (1998) proposes that a chip capacitor is mounted near a cavity wherein a semiconductor device is hermetically sealed, whereby the chip capacitor is disposed as near to the semiconductor device as possible. However, since the capacitor is mounted in portions different from the portion where the semiconductor device is wired, wiring length increases, resulting in increasing value of inductance. That is, connection between the capacitor and the semiconductor device requires it to make wiring through the via hole conductors and the wiring circuit formed in the dielectric substrate.
In Japanese Unexamined Patent Publication (Kokai) No. 11-220262 (1999), such a wiring board is proposed as all insulation layers that constitute a dielectric substrate are formed from a mixture including an inorganic filler and a thermosetting resin, in relation to a module incorporating circuit components and a method of producing the same. However, this circuit board has such a problem as the weak mechanical strength and low rigidity of the board cause the wiring board to deform with a flip chip portion warping, when the semiconductor device is mounted on the surface of the wiring board by flip chip mounting procedure.
Moreover, for example, Japanese Unexamined Patent Publication (Kokai) No. 2-121393 (1990) proposes to embed a chip capacitor in an insulation layer between a power supply layer and a ground layer. In Japanese Unexamined Patent Publication (Kokai) No. 11-220262 (1999) and Japanese Unexamined Patent Publication (Kokai) No. 10-51150 (1998) such wiring boards are proposed as semiconductor devices and capacitors are incorporated in a dielectric substrate.
In the constitution disclosed in Japanese Unexamined Patent Publication (Kokai) No. 2-121393 (1990), ceramic chip capacitors embedded in an insulation layer between a power supply layer pattern and a ground layer pattern are supported by the surrounding insulation layers. However, connections between the terminal electrodes of the capacitor, power supply layer in the substrate and the ground layer are made by pressure contact. As a result, when subjected to a thermal shock, the connection performance between the terminal electrode and the wiring circuit layer changes due to the difference in the thermal expansion coefficient.
Japanese Unexamined Patent Publication (Kokai) No. 11-220262 (1999) also proposes to connect the electrodes of a semiconductor device and a wiring circuit layer by means of a conductor such as gold, silver, copper, nickel or solder. However, in the case that an electronic component such as semiconductor device is soldered onto the surface of a wiring board, there has been such a problem that the connection performance between the terminal electrode and the wiring circuit layer changes when the solder is reflowed at a temperature from 220 to 300° C. Where the component incorporated inside is a capacitor, in particular, inductance due to the capacitor increases, thus leading to a change or deterioration of the function of the capacitor to remove noise.
Moreover, in the capacitor incorporating wiring board of the prior art described in for example, Japanese Unexamined Patent Publication (Kokai) No. 2-121393 (1990), Japanese Unexamined Patent Publication (Kokai) No. 11-220262 (1999) or Japanese Unexamined Patent Publication (Kokai) No. 10-51150 (1998), there is a problem of low reliability of connection between the capacitor and the wiring circuit layer on the wiring board when thermal cycles or stress is exerted thereon.
Such a method has been proposed for fastening a capacitor on a wiring board that a clearance between the capacitor and an insulation layer is filled with a thermosetting resin and the thermosetting resin is hardened together with the insulation layer thereby to bond firmly.
However, since the capacitor has lower thermal expansion coefficient than the insulation layer, the capacitor is subjected to stress when thermal cycles are applied. The stress may damage the capacitor or impair the reliability of the connection thereof with the wiring circuit layer.
In the case of for example, Japanese Unexamined Patent Publication (Kokai) No. 11-220262 (1999), although a constitution of incorporating semiconductor device and/or chip electric components in a wiring board is described, there is no description on a relation with via hole conductors of the wiring board or the conductor layer where an electric circuit is to be formed, or on the relation between the via hole conductors connected to a plurality of electric components. For example, in the case that via holes where currents flow in the same direction are located close to each other, the effect of the mutual inductance of the two via hole conductors becomes conspicuous particularly when a signal of high frequency is transmitted, resulting in an increase in the inductance of the wiring.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a constitution of a wiring board that reduces the generation of noise due to high speed operation of electronic components and effectively decreases the inductance due to electric elements disposed near an electronic components.
A second object of the present invention is to provide a wiring board that incorporates electric elements such as capacitors inside a dielectric substrate thereof, and ensures excellent performance and reliability of mounting components even in the case of flip-chip mounting of electronic components such as semiconductor devices on the surface of the substrate.
A third object of the present invention is to provide an electric element incorporating wiring board having excellent reliability of connection between electric elements incorporated inside thereof and a wiring circuit layer formed on the wiring board.
A fourth object of the present invention is to provide an electric element incorporating wiring board that incorporates electric elements such as capacitors inside a dielectric substrate thereof, and maintains connection between the electric elements incorporated inside thereof and a wiring circuit layer formed on the wiring board with such an excellent reliability that the functions of the incorporated electric elements does not change after reflow of solder for mounting electronic components on the surface.
The present inventors have intensively studied about the electric element incorporating wiring board that incorporates electric elements inside an dielectric substrate thereof, and has ele
Hayashi Katsura
Iino Yuji
Iwachi Hiromi
Dinkins Anthony
Hogan & Hartson L.L.P.
Kyocera Corporation
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