Electric current switch circuit and D/A converter using same

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

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Details

C341S133000, C326S017000, C326S019000, C326S089000

Reexamination Certificate

active

06459396

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electric current switch circuit that switches ON or OFF the electric current in response to an output of an injection bipolar logic circuit (hereinafter referred to as an IIL (Integrated Injection Logic) logic current and relates to a digital to analog converter (hereinafter referred to as a D/A converter) for which such an electric current switch circuit is suitable.
BACKGROUND OF THE INVENTION
In an IIL logic circuit that realizes large scale integration and low power consumption, the withstand voltage of the IIL transistor to be sued is low. When connecting the IIL logic circuit with an external circuit, no more than about 1.5 voltage, the usual withstand voltage of the IIL transistor, should be applied to the output of the IIL logic circuit.
FIG. 7
is an electric circuit diagram showing a structure of a D/A converter
1
that is realized by a plurality of typical conventional electric current switch circuits which receive the outputs of the respective IIL logic circuits. The D/A converter
1
is an N-bit R-2R resistor ladder type. The D/A converter
1
is composed of electric current switch circuits sw
1
, sw
2
, . . . , and swN. A line
2
to which a reference voltage Vref is applied is commonly connected with one end of resistors r
11
, r
12
, . . . , and r
1
N in the respective electric current switch circuits sw
1
, sw
2
, . . . and swN. Resistors r
22
, r
23
, . . . , and r
2
N are connected between the other ends of adjacent resistors r
11
, r
12
, . . . , and r
1
N. Such other ends are electrically switched ON and/or OFF with respect to a ground line by the respective electric current switch circuits sw
1
, sw
2
, . . . , and swN. The resistors r
11
, r
12
, . . . , and r
1
N and the resistors r
22
r
23
, . . . and r
2
N constitute a resistor ladder circuit. The reference voltage Vref is divided in accordance with the combinations of the resistors r
11
, r
12
, . . . , and r
1
N and the resistors r
22
, r
23
, . . . ,and r
2
N so as to be outputted to an output terminal
3
as a D/A converted signal from the above-mentioned other end of the resistor r
1
N in the electric current switch circuit swN of the last stage.
In the electric current switch circuit sw
1
, transistors of NPN type (hereinafter referred to as NPN transistors) q
1
and q
2
form a pair. The emitters of the NPN transistors q
1
and q
2
are commonly connected with the collector of a NPN transistor q
3
, and its emitter is connected with the ground through a resistor r
1
. In the NPN transistor q
1
, a constant voltage of 1.4V is applied to the base, and the collector is connected with a point connecting the resistor r
11
with the resistor r
22
. In the NPN transistor q
2
, the collector is connected with the line
2
, the base is connected with a point connecting transistors of PNP type (hereinafter referred to as PNP transistors) q
4
and q
5
that are provided so as to be connected in series with each other between the ground and a power source line
4
to which a high level Vcc is applied. A voltage of 1.4V is applied to the base of the PNP transistor q
5
. The point connecting PNP transistors q
4
with q
5
, i.e., the base of the NPN transistor q
2
is connected with the collector of an NPN transistor q
6
. The base of the NPN transistor q
6
receives an output of the IIL logic circuit c
1
, and is connected with the power source line
4
to which the high level Vcc is applied. The emitter of the NPN transistor q
6
is connected with the ground line, i.e., is grounded.
The D/A converter
1
is further provided with a constant current generation circuit
5
in which a constant electric current obtained by multiplying constant current Iref by a predetermined numeral value. The constant electric current is generated by (1) a pair of NPN transistors q
11
and q
12
that constitute a current mirror circuit, (2) a NPN transistor q
13
, (3) resistors r
31
through r
33
, and (4) a constant current source f. The constant electric current flows to the ground through the NPN transistor q
3
that constitute a current mirror circuit together with the NPN transistors q
11
and q
12
. The constant electric current flows to the ground through an NPN transistor q
14
that constitute a current mirror circuit together with the NPN transistors q
11
and q
12
. This allows the constant electric current to flow through a PNP transistor q
15
that is connected in series with the NPN transistor q
14
. Accordingly, the constant electric current flows through the respective PNP transistors q
4
and q
7
that constitute a current mirror circuit together with the PNP transistors q
15
.
With the electric current switch circuit sw
1
having the above structure, the current that flows to the ground through the NPN transistor q
3
is switched ON or OFF in accordance with the difference between the base voltages of the NPN transistors q
1
and q
2
. More specifically, when the base voltage of the NPN transistor q
1
is fully greater than that of the NPN transistor q
2
, the electric current flows to the NPN transistor q
3
from the resistor ladder circuit. In contrast, when the base voltage of the NPN transistor q
1
is fully smaller than that of the NPN transistor q
2
, the electric current does not flow to the NPN transistor q
3
from the resistor ladder circuit. The electric current switch circuits sw
1
through swN are connected in series with each other in accordance with the resolution required for the D/A converter. Thus, the D/A converter
1
of an N-bit R-2R resistor ladder type is constituted. Note that the electric current switch circuits sw
2
through swN have the same structure as the electric current switch circuits swl. The electric current switch circuits sw
2
through swN switch ON and/or OFF in response to the outputs of the respective IIL logic circuits c
2
through cN.
In order not to have the NPN transistor q
3
saturated so as to maintain the constant electric current, it is always necessary to apply a voltage of not less than (Vr
1
+Vdsat) to the collector of the NPN transistor q
3
. Note that the voltage Vr
1
indicates the drop voltage across the resistor r
1
, and the voltage Vdsat indicates the saturated voltage of the NPN transistor q
3
. The. saturated voltage Vdsat falls within the range of about 0.1V and 0.3V. When the drop voltage Vr
1
is equal to 0.3V, it is necessary to apply a voltage of not less than 0.6V to the collector of the NPN transistor q
3
. The drop voltage Vbe between the base-emitter of the transistor falls within the range of about 0.6V and 0.8V. Accordingly, it is necessary to satisfy the following requirement, i.e., it is necessary to apply a voltage of not less than 1.4V (=Vr
1
+Vdsat+Vbe) to at least one of the bases of the NPN transistors q
1
and q
2
. According to the electric current switch circuit sw
1
, in order to satisfy the above requirement, a constant voltage of 1.4V is applied to the base of the NPN transistor q
1
, as has been described above, so as to carry out the switching operation by changing the base voltage of the NPN transistor q
2
.
In the mean time, when considering the difference between the base voltages of the NPN transistors q
1
and q
2
required for the switching, in order to make the collector current ratio of the NPN transistors q
1
and q
2
be 1:1000 so as to fully carry out the switching, it is necessary to maintain the voltage difference of (VTxln(1000)) between the base voltages of the NPN transistors q
1
and q
2
. Note that VT indicates a thermal voltage, and has a voltage of about 26 mV when the element temperature is at 25° C. while 37 mV when the element temperature is at 150° C. A voltage of not less than 256 mV is required for the voltage difference between the base voltages of the NPN transistors q
1
and q
2
, when it is assumed that VT is equal to 37 mV. Thus, in order to fully carry out the switching, it is necessary for the base voltage of the NPN transistor q
2
to be a voltage of not less than 1.66V or a voltage of not more than 1.14V which

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