Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2001-05-07
2003-09-30
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S666000, C257S676000, C257S690000, C257S692000, C257S782000, C257S784000, C257S783000, C438S123000, C438S617000, C438S118000
Reexamination Certificate
active
06627982
ABSTRACT:
TECHNICAL FIELD
The present invention regards an electric connection structure for electronic power devices, and a method of connection.
BACKGROUND OF THE INVENTION
As is known, bipolar or discrete MOS power devices (operating at powers of over 0.5 W) are required, which are fast (with cut-off frequencies higher than 20 GHz) and have operating frequencies typical of the “S band” (2-4 GHz). These devices are extensively used in the radio-frequency range, in particular in analog and digital telephones, in cordless telephones, radars, satellite television, and high-frequency oscillators.
In particular, elementary cells are required comprising BJT NPN or MOS transistors with a high integration level so as to be inserted in ever smaller packages. Thereby, it is possible to reduce the parasitic capacitances and inductances introduced by the package, which would reduce the performance of the device.
For these devices, the self-aligned double-polysilicon technology is widely used, which enables cut-off frequencies higher than 50 GHz to be reached. In these devices, the individual transistors are insulated by trenches filled with insulating material, so as to reduce the parasitic capacitance towards the substrate and to reduce the size of the BJT device, or through diffused regions around the active area. The emitter, base and collector contacts are generally provided on the front of the wafer, at pads, and are connected to the pins of the device by wire bonding.
Since these are power devices, and therefore pass strong currents, the electrical connections call for pads having a considerable area (at least 60×60 &mgr;m
2
), and require the use of wires of large diameter (for example, 25.5 &mgr;m), thus increasing the size of the die integrating the device, in contrast with what would be desirable.
In the surface portion of the die of certain devices there is, moreover, the need to connect one of the terminals (collector, base, emitter, drain, source, or gate) to the substrate, so as to obtain a bottom-collector, bottom-base, bottom-emitter, bottom-drain, bottom-source, or bottom-gate. This connection may be made inside the die through a diffused region that extends from the surface to the bottom part of the die, or else externally through a wire that provides the electrical connection between the particular pad and the portion of the lead frame (hereinafter also called support region) on which the die is bonded, alongside the die. In this case, in order to prevent excessive bending of the connection wire (or connection wires if a multiple connection is required), the support region must have a peripheral portion (around the die) of considerable dimensions. For example, at present it is required that the support region has a free wire-soldering area having a width (i.e., distance between the edge of the die and the edge of the support region) of at least 300 &mgr;m for each side on which a connection wire is to be bonded.
It follows that an electrical connection using the wire-bonding technique for power devices of the type specified above entails high encumbrance which is in conflict with the demand for ever smaller packages. In addition, the high number of required connection wires causes a high parasitic inductance and reduces the performance of the device.
SUMMARY OF THE INVENTION
The aim of the present invention is to provide an improved electric connection structure.
According to the present invention, an electronic device and a relative method of connection are described as follows:
On a semiconductor material body housing an electronic device a peripheral region of semiconductor material and at least one pad are initially formed. The peripheral region is connected to a first terminal of the electronic device and extends on at least one peripheral portion of the semiconductor material body. The pad is insulated from the semiconductor material body and is electrically connected to a second terminal of the electronic device. The semiconductor material body is fixed to a support body formed on a blank belonging to a reel. The pad is connected by a wire to an electrode formed by the blank. Next, a connection region is formed, by galvanic growth, on the peripheral region, and surrounds, at least partially, the semiconductor material body and the support body, effecting an electrical connection between the peripheral region of the semiconductor material body and the support body. The connecting wire and electrode are surrounded by the same galvanic growth, resulting in an increase in the diameter of the wire. The device is then encapsulated according to known processes, and the blank is cut to obtain the finished product.
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Bruno Giuseppe
Lo Verde Domenico
Bennett II Harold H.
Erdem Fazli
Flynn Nathan J.
Jorgenson Lisa K.
STMicroelectronics S.r.l.
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