Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
1998-05-20
2001-05-01
Shah, Kamini (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C324S503000
Reexamination Certificate
active
06226602
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to an electric circuit arrangement for checking a series circuit which includes a load and a switch. The circuit arrangement includes a first circuit which is connected to the connecting circuit node between the switch and the load. This first circuit is suitable for detecting a first state and this first state defines a short circuit of the connecting circuit node to the supply voltage. The invention also relates to a method for checking a series circuit which includes a switch and a load. In this method, a first state is detected by a first circuit. The first state defines a short circuit of the connecting circuit node of the switch and the load to the supply voltage.
BACKGROUND OF THE INVENTION
A circuit arrangement of this kind is generally known and is often used, for example, in motor vehicles to check the switching in and switching out of a load such as the brake light of the motor vehicle. With the aid of the circuit arrangement, the situation is to be achieved that a fault in the switch, which switches the load in and out, and/or a fault in the load itself is automatically detected.
If, for example, the load is connected to the supply voltage and the switch is connected to ground, then a low potential must be present at the connecting circuit node in a fault-free case wherein the switch is closed. If, in contrast, a high potential is present at the connecting circuit node, this means that a short circuit of the connecting circuit node to the supply voltage is present; that is, the load, for example, has a fault and defines a short circuit. This first state can be clearly detected by the first circuit.
If the switch is open, a high potential must be present at the connecting circuit node in the fault-free case. However, if, for example, the switch is defective and forms a short circuit to ground, or if the connecting cable of the load to the supply voltage is disconnected so that an interruption is present, these two states can be detected in that a low voltage is present at the connecting node when the switch is open. However, the two states cannot be clearly distinguished by the first circuit.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a circuit arrangement and a method of the kind described above with which the above-mentioned fault states can be clearly detected and can be distinguished.
The electric circuit arrangement of the invention is for checking a series circuit connected between a supply voltage and ground. The series circuit includes a load and a switch connected to each other at a circuit node. The electric circuit arrangement includes: a first circuit connected to the circuit node and being configured to detect a first state defined by a short circuit of the circuit node to the supply voltage; a second circuit connected in parallel with the first circuit and connected to the circuit node; the second circuit being configured to detect a second state defined by a short circuit of the circuit node to ground and to detect a third state defined by an interruption of the connection of the circuit node to the supply voltage.
The method of the invention is for checking a series circuit connected between a supply voltage and ground with the series circuit including a load and a switch connected to each other at a circuit node. The method includes the steps of: providing a first circuit connected to the circuit node and detecting a first state with the first circuit and the first state being defined by a short circuit of the circuit node to the supply voltage; providing a second circuit connected to the circuit node and detecting a second state or a third state with the second circuit and the second state being defined by a short circuit of the circuit node to ground and the third state being defined by an interruption of the connection of the circuit node to the supply voltage.
Thus, and according to a feature of the invention, a second circuit is provided, which distinguishes the two states which cannot be clearly distinguished by the first circuit. With this second circuit, the above-mentioned fault states can be clearly detected. The second circuit is connected in parallel with the first circuit. In this way, the first and second circuits can simultaneously detect the states. The fault detection is significantly accelerated in this manner.
In an advantageous embodiment of the invention, a check is first made as to whether the second or the third state can even be present and the detection step with respect to the second or the third state is only executed when this is the case. Stated otherwise, this means that the detection step, which is executed by the second circuit, is only utilized when a previous check has shown that the second or the third state can even be present at all. If the detection step, which is executed by the second circuit, is very time intensive with respect to the second or third states, then the entire fault detection can be further accelerated via a rapid advance check. Only when the second or the third state can even be present, is it necessary that the time-intensive detection step with respect thereto must be awaited; otherwise, the fault detection can already be completed in advance of the time-intensive detection step.
It is especially purposeful when the check is executed by the first circuit. This affords the advantage that, for the check, no additional components or the like are required. Furthermore, the entire fault detection is further accelerated with a rapidly operating first circuit.
In an advantageous further embodiment of the invention, the first circuit has a digital circuit which is suited to distinguish a high potential and a low potential from each other at the connecting circuit node. If a high potential is detected by the first circuit, then, for a closed switch, and as already explained, the first state is present, that is, for example, a short circuit via the load to the supply voltage. If, in contrast, the first circuit detects a low potential, then, for an open switch, and as explained above, either a short circuit to ground or an interruption to the load or supply voltage is present. This last result defines either the second or third state between which the first circuit, however, cannot clearly distinguish. The result can, however, be utilized as a test as to whether the second or third states can even be present. In total, and with the aid of the digital circuit according to the invention, the first state can be clearly detected on the one hand, as well as making a decision on the other hand, as to whether the second or the third states can even be present and, whether the result of the second circuit must therefore even be evaluated.
In a further advantageous embodiment of the invention, the second circuit includes an analog circuit which is suitable to distinguish a mid potential and a low potential from each other at the connecting circuit node. As already explained, a high potential must be present at the connecting circuit node for an open switch in the fault-free case. If a low potential is detected by the second circuit for an open switch, then a short circuit of the connecting circuit node to ground is present, for example, because of a defect of the switch. This is the second state. However, if a mid potential is detected by the second circuit for an open switch, then an interruption of the connecting circuit node to the supply voltage is present, for example, because there is an interruption of the cable connection from the load to the supply voltage. This is third state. With the aid of the analog circuit of the invention, the second and third states can be clearly detected in this way.
It is especially purposeful when the first circuit and the second circuit are connected at their output ends to a microprocessor and when the switch is switchable on and off by the microprocessor. In this way, all necessary data to detect the first or second or third state are present in the microprocessor. Likewise, the result of the fault de
Schmitt Hans-Walter
Schneider Claus
Ottesen Walter
Robert & Bosch GmbH
Shah Kamini
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