Elastic store slip circuit apparatus for preventing read and wri

Boots – shoes – and leggings

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Details

G11C 700, G06F 1100, G06F 1300

Patent

active

041715381

ABSTRACT:
A method of and circuitry for the operations of reading from and writing into a memory, each of which operations occurs on a sequential basis and each of which has different clock rates while preventing erroneous information from being read due to interference with attempted writing at the same address. This is accomplished by comparing the read and write addresses and when they approach each other, forcing the most significant bit of one of the sequentially occurring addresses to be altered in a step function whereby interference cannot occur. The above is used as an elastic store.

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