Multiplex communications – Wide area network – Packet switching
Patent
1980-06-05
1982-04-06
Brown, Thomas W.
Multiplex communications
Wide area network
Packet switching
H04J 307
Patent
active
043237908
ABSTRACT:
An elastic storage circuit employs a first in/first out (FIFO) memory which stores data contained in a serial stream in a plurality of locations, each of which is associated with a unique address. The storage locations operate to store both the data and the address. A word address counter generates a five bit address code to accompany the data bits as stored in the FIFO. If a chronic increase or decrease in the frequency rate of the data occurs, the FIFO will overflow or underflow. This condition is detected by suitable detectors which create an alarm to completely reset the entire contents of the memory and to refill a portion of the memory over a given interval sufficient to permit the system to recover from the slip in the data rate and to thereafter synchronously read the data together with the address identification from the FIFO.
REFERENCES:
patent: 3868481 (1975-02-01), Patrusky et al.
patent: 4270203 (1981-05-01), Collins et al.
Dunning Stephen C.
Sutherland Joseph E.
Brown Thomas W.
International Telephone and Telegraph Corporation
O'Halloran John T.
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